P

Inventor

GUTHRIE GUY L

US256 patents
⚠️ This page may combine multiple inventors who share the name “GUTHRIE GUY L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

39 patents
US5613153AMar 18, 1997

Coherency and synchronization mechanisms for I/O channel controllers in a data processing system

IBM96 citations96
US10067713B2Sep 4, 2018

Efficient enforcement of barriers with respect to memory move sequences

IBM17 citations94
US9785557B1Oct 10, 2017

Translation entry invalidation in a multithreaded data processing system

IBM23 citations94
US9575815B1Feb 21, 2017

Translation entry invalidation in a multithreaded data processing system

IBM25 citations94
US7475191B2Jan 6, 2009

Processor, data processing system and method for synchronizing access to data in shared memory

IBM33 citations93
US7536513B2May 19, 2009

Data processing system, cache system and method for issuing a request on an interconnect fabric without reference to a lower level cache based upon a tagged cache state

IBM23 citations92
US7447845B2Nov 4, 2008

Data processing system, processor and method of data processing in which local memory access requests are serviced by state machines with differing functionality

IBM29 citations92
US5379386AJan 3, 1995

Micro channel interface controller

IBM35 citations89
US10318435B2Jun 11, 2019

Ensuring forward progress for nested translations in a memory management unit

IBM6 citations84
US9772945B1Sep 26, 2017

Translation entry invalidation in a multithreaded data processing system

IBM9 citations84
US9753862B1Sep 5, 2017

Hybrid replacement policy in a multilevel cache memory hierarchy

IBM11 citations84
US9727488B1Aug 8, 2017

Counter-based victim selection in a cache memory

IBM7 citations84
US9727489B1Aug 8, 2017

Counter-based victim selection in a cache memory

IBM8 citations84
US9710394B2Jul 18, 2017

Translation entry invalidation in a multithreaded data processing system

IBM10 citations84
US9632942B2Apr 25, 2017

Expedited servicing of store operations in a data processing system

IBM6 citations84
US9575825B2Feb 21, 2017

Push instruction for pushing a message payload from a sending thread to a receiving thread

IBM6 citations84
US9501411B2Nov 22, 2016

Cache backing store for transactional memory

IBM8 citations84
US9430166B2Aug 30, 2016

Interaction of transactional storage accesses with other atomic semantics

IBM6 citations84
US9396127B2Jul 19, 2016

Synchronizing access to data in shared memory

IBM8 citations84
US9390026B2Jul 12, 2016

Synchronizing access to data in shared memory

IBM7 citations84
US9058260B2Jun 16, 2015

Transient condition management utilizing a posted error detection processing protocol

IBM8 citations84
US9047221B2Jun 2, 2015

Virtual machines failover

IBM7 citations84
US8930629B2Jan 6, 2015

Data cache block deallocate requests in a multi-level cache hierarchy

IBM7 citations84
US7818511B2Oct 19, 2010

Reducing number of rejected snoop requests by extending time to respond to snoop request

IBM12 citations84
US7818388B2Oct 19, 2010

Data processing system, method and interconnect fabric supporting multiple planes of processing nodes

IBM11 citations84
US7734876B2Jun 8, 2010

Protecting ownership transfer with non-uniform protection windows

IBM11 citations84
US7716428B2May 11, 2010

Data processing system, cache system and method for reducing imprecise invalid coherency states

IBM8 citations84
US7533321B2May 12, 2009

Fault tolerant encoding of directory states for stuck bits

IBM9 citations84
US7454578B2Nov 18, 2008

Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a location of a memory

IBM12 citations84
US7444494B2Oct 28, 2008

Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a history-based prediction

IBM14 citations84
US8347037B2Jan 1, 2013

Victim cache replacement

IBM8 citations83
US8347036B2Jan 1, 2013

Empirically based dynamic control of transmission of victim cache lateral castouts

IBM18 citations83
US7454580B2Nov 18, 2008

Data processing system, processor and method of data processing that reduce store queue entry utilization for synchronizing operations

IBM13 citations83
US7610458B2Oct 27, 2009

Data processing system, processor and method of data processing that support memory access according to diverse memory models

IBM13 citations82
US7689891B2Mar 30, 2010

Method and system for handling stuck bits in cache directories

IBM7 citations74
US7483422B2Jan 27, 2009

Data processing system, method and interconnect fabric for selective link information allocation in a data processing system

IBM7 citations74
US7404046B2Jul 22, 2008

Cache memory, processing unit, data processing system and method for filtering snooped operations

IBM8 citations74
US11106608B1Aug 31, 2021

Synchronizing access to shared memory by extending protection for a target address of a store-conditional request

IBM3 citations73
US10997075B2May 4, 2021

Adaptively enabling and disabling snooping bus commands

IBM1 citations73

GUTHRIE GUY L

5 patents

ARIMILLI RAVI K

2 patents

CARGNONI ROBERT A

1 patent

CLARK LEO J

1 patent

CUMMINGS DAVID W

1 patent

BELL JR ROBERT H

1 patent

Showing the top 50 of 256 patents by PatentIndex Score.