Inventor
NEWELL DONALD
US24 patents
⚠️ This page may combine multiple inventors who share the name “NEWELL DONALD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
17 patentsUS7802057B2Sep 21, 2010
Priority aware selective cache allocation
INTEL CORP94 citations95
US9235256B2Jan 12, 2016
Methods and apparatuses for controlling thread contention
INTEL CORP8 citations92
US8775834B2Jul 8, 2014
Methods and apparatuses for controlling thread contention
INTEL CORP8 citations92
US8036246B2Oct 11, 2011
Packet coalescing
INTEL CORP12 citations92
US7725657B2May 25, 2010
Dynamic quality of service (QoS) for a shared cache
INTEL CORP33 citations92
US7620071B2Nov 17, 2009
Packet coalescing
INTEL CORP17 citations92
US7552288B2Jun 23, 2009
Selectively inclusive cache architecture
INTEL CORP19 citations92
US9218046B2Dec 22, 2015
Methods and apparatuses for controlling thread contention
INTEL CORP4 citations83
US8924748B2Dec 30, 2014
Methods and apparatuses for controlling thread contention
INTEL CORP5 citations83
US8738942B2May 27, 2014
Methods and apparatuses for controlling thread contention
INTEL CORP5 citations83
US7895415B2Feb 22, 2011
Cache sharing based thread control
INTEL CORP16 citations82
US10652147B2May 12, 2020
Packet coalescing
INTEL CORP2 citations73
US10613876B2Apr 7, 2020
Methods and apparatuses for controlling thread contention
INTEL CORP1 citations72
US9485178B2Nov 1, 2016
Packet coalescing
INTEL CORP3 citations70
US7991956B2Aug 2, 2011
Providing application-level information for use in cache management
INTEL CORP6 citations62
US7921276B2Apr 5, 2011
Applying quality of service (QoS) to a translation lookaside buffer (TLB)
INTEL CORP6 citations62
US9715397B2Jul 25, 2017
Methods and apparatuses for controlling thread contention
INTEL CORP0 citations51