Inventor
TO HING Y
US19 patents
⚠️ This page may combine multiple inventors who share the name “TO HING Y”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
18 patentsUS7194559B2Mar 20, 2007
Slave I/O driver calibration using error-nulling master reference
INTEL CORP38 citations92
US6941484B2Sep 6, 2005
Synthesis of a synchronization clock
INTEL CORP29 citations92
US6885959B2Apr 26, 2005
Circuit and method for calibrating DRAM pullup Ron to pulldown Ron
INTEL CORP35 citations92
US6771515B2Aug 3, 2004
Systems having modules with on die terminations
INTEL CORP29 citations92
US6747483B2Jun 8, 2004
Differential memory interface system
INTEL CORP29 citations92
US6725390B1Apr 20, 2004
Method and an apparatus for adjusting clock signal to sample data
INTEL CORP20 citations92
US7602859B2Oct 13, 2009
Calibrating integrating receivers for source synchronous protocol
INTEL CORP22 citations91
US7692457B2Apr 6, 2010
Dual-path clocking architecture
INTEL CORP8 citations82
US6724082B2Apr 20, 2004
Systems having modules with selectable on die terminations
INTEL CORP8 citations74
US6597202B1Jul 22, 2003
Systems with skew control between clock and data signals
INTEL CORP9 citations74
US7334148B2Feb 19, 2008
Optimization of integrated circuit device I/O bus timing
INTEL CORP7 citations73
US6507218B1Jan 14, 2003
Method and apparatus for reducing back-to-back voltage glitch on high speed data bus
INTEL CORP9 citations73
US7010637B2Mar 7, 2006
Single-ended memory interface system
INTEL CORP6 citations63
US6631083B2Oct 7, 2003
Systems with modules and clocking therefore
INTEL CORP5 citations63
US6973603B2Dec 6, 2005
Method and apparatus for optimizing timing for a multi-drop bus
INTEL CORP3 citations62
US7117401B2Oct 3, 2006
Method and apparatus for optimizing timing for a multi-drop bus
INTEL CORP0 citations52
US7805627B2Sep 28, 2010
Clock synchronization scheme for deskewing operations in a data interface
INTEL CORP1 citations51
US7446572B2Nov 4, 2008
Method and system for a configurable Vcc reference and Vss reference differential current mode transmitter
INTEL CORP0 citations48