Inventor
DAI JINQUAN
CN17 patents
⚠️ This page may combine multiple inventors who share the name “DAI JINQUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
11 patentsUS7890943B2Feb 15, 2011
Code optimization based on loop structures
INTEL CORP7 citations83
US7793276B2Sep 7, 2010
Apparatus and method for automatically parallelizing network applications through pipelining transformation
INTEL CORP10 citations83
US7606974B2Oct 20, 2009
Automatic caching generation in network applications
INTEL CORP15 citations83
US8037466B2Oct 11, 2011
Method and apparatus for merging critical sections
INTEL CORP3 citations62
US7752611B2Jul 6, 2010
Speculative code motion for memory latency hiding
INTEL CORP4 citations62
US7634767B2Dec 15, 2009
Method and system for assigning register class through efficient dataflow analysis
INTEL CORP2 citations62
US7412568B2Aug 12, 2008
Method for thread caching
INTEL CORP6 citations62
US7392513B2Jun 24, 2008
Methods and apparatus for merging critical sections
INTEL CORP4 citations62
US7581214B2Aug 25, 2009
Live set transmission in pipelining applications
INTEL CORP2 citations61
US7774769B2Aug 10, 2010
Transmitting trace-specific information in a transformed application
INTEL CORP1 citations48
US7620787B2Nov 17, 2009
Optimizing memory accesses for network applications using indexed register files
INTEL CORP0 citations48
GUO XIAOFENG
3 patentsUS8745606B2Jun 3, 2014
Critical section ordering for multiple trace applications
GUO XIAOFENG5 citations71
US8612957B2Dec 17, 2013
Scheduling multithreaded programming instructions based on dependency graph
GUO XIAOFENG4 citations61
US8769513B2Jul 1, 2014
Latency hiding of traces using block coloring
GUO XIAOFENG1 citations50