Inventor

CHEN CHEN-SHIEN

TW369 patents

⚠️ This page may combine multiple inventors who share the name “CHEN CHEN-SHIEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN CHEN-SHIEN

TAIWAN SEMICONDUCTOR MFG

Fan-out interconnect structure and method for forming same

POP structures and methods of forming the same

Tapered through-silicon via structure

3D die stacking structure with fine pitches

Passive devices in package-on-package structures and methods for forming the same

Warpage reduction and adhesion improvement of semiconductor die package

Backside connection to TSVs having redistribution lines

Bond pad connection to redistribution lines having tapered profiles

Conductive contacts having varying widths and method of manufacturing same

Tapered through-silicon via structure

Metal routing architecture for integrated circuits

Apparatus and method for a component package

Through-silicon via with scalloped sidewalls

Structure and process for the formation of TSVs

Multi-die wafer level packaging

Substrate pad structure

Packaged semiconductor devices and packaging methods

Bonded structures for package and substrate

Through silicon via with dummy structure and method for forming the same

CMP apparatus and process sequence method

TAIWAN SEMICONDUCTOR MFG CO LTD

Multi-die package with bridge layer and method for making the same

Warpage control of semiconductor die package

Substrate interconnections having different sizes

Semiconductor structure and method

Elongated bump structures in package structure

Structure and formation method of semiconductor device with magnetic element

Structure and formation method of semiconductor device with magnetic element

Packaging mechanisms for dies with different sizes of connectors

Bump-on-trace interconnect

CHEN CHIH-HUA

Through-silicon vias and methods for forming the same

PoP structures including through-assembly via modules

Through-assembly via modules and methods for forming the same

KUO TIN-HAO

Conical-shaped or tier-shaped pillar connections

Pillar structure having a non-planar surface for semiconductor devices

HUANG HON-LIN

Formation of TSV backside interconnects by modifying carrier wafers

Front side copper post joint structure for temporary bond in TSV application

Shen wen-wei

Substrate interconnections having different sizes

Strength of micro-bump joints

TAIWAN SEMICONDUCTOR MANFACTUR

Introducing a metal layer between SiN and TiN to improve CBD contact resistance for P-TSV

LIU JEN-CHENG

Bonding process for CMOS image sensor

HU YEN-CHANG

Methods and apparatus for package on package devices with reversed stud bump through via interconnections

CHEN MING-FA

Method of forming stacked dies

CHANG HUNG-PIN

Method of forming bump structure having tapered sidewalls for stacked dies

LO SUT-I

Package structures including a capacitor and methods of forming the same

CHUANG YAO-CHUN

T-shaped post for semiconductor devices

TSAI PEI-CHUN

Connecting function chips to a package to form package-on-package

CHANG CHIH-HORNG

Bump structures

TAIWAN SEMCONDUCTOR MFG CO LTD

Fixture for P-through silicon via assembly

PAN KUO LUNG

Packaging methods and packaged devices

HSIAO C W

Method of forming stacked-die packages