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Inventor
ACHARYA BUDERYA S
US
2 patents
Patents
2 patents
US7996572B2
Aug 9, 2011
Multi-node chipset lock flow with peer-to-peer non-posted I/O requests
INTEL CORP
16 citations
82
US7350030B2
Mar 25, 2008
High performance chipset prefetcher for interleaved channels
INTEL CORP
7 citations
69