P

Inventor

MOCUTA ANDA C

US28 patents
⚠️ This page may combine multiple inventors who share the name “MOCUTA ANDA C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

20 patents
US7723750B2May 25, 2010

MOSFET with super-steep retrograded island

IBM124 citations99
US6916698B2Jul 12, 2005

High performance CMOS device structure with mid-gap metal gate

IBM139 citations99
US6881635B1Apr 19, 2005

Strained silicon NMOS devices with embedded source/drain

IBM176 citations99
US7067400B2Jun 27, 2006

Method for preventing sidewall consumption during oxidation of SGOI islands

IBM62 citations96
US6762469B2Jul 13, 2004

High performance CMOS device structure with mid-gap metal gate

IBM68 citations96
US6303450B1Oct 16, 2001

CMOS device structures and method of making same

IBM67 citations96
US7705345B2Apr 27, 2010

High performance strained silicon FinFETs device and method for forming same

IBM52 citations93
US7268049B2Sep 11, 2007

Structure and method for manufacturing MOSFET with super-steep retrograded island

IBM21 citations92
US7056782B2Jun 6, 2006

CMOS silicide metal gate integration

IBM25 citations92
US6509241B2Jan 21, 2003

Process for fabricating an MOS device having highly-localized halo regions

IBM35 citations92
US6746924B1Jun 8, 2004

Method of forming asymmetric extension mosfet using a drain side spacer

IBM45 citations91
US7691698B2Apr 6, 2010

Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain

IBM15 citations84
US7560326B2Jul 14, 2009

Silicon/silcion germaninum/silicon body device with embedded carbon dopant

IBM18 citations84
US6635517B2Oct 21, 2003

Use of disposable spacer to introduce gettering in SOI layer

IBM13 citations83
US7411227B2Aug 12, 2008

CMOS silicide metal gate integration

IBM7 citations73
US7879650B2Feb 1, 2011

Method of providing protection against charging damage in hybrid orientation transistors

IBM3 citations63
US8042070B2Oct 18, 2011

Methods and system for analysis and management of parametric yield

IBM3 citations62
US7655557B2Feb 2, 2010

CMOS silicide metal gate integration

IBM4 citations62
US7928513B2Apr 19, 2011

Protection against charging damage in hybrid orientation transistors

IBM0 citations52
US7492016B2Feb 17, 2009

Protection against charging damage in hybrid orientation transistors

IBM0 citations52

CULP JAMES A

2 patents

CHANG PAUL

1 patent

GLOBALFOUNDRIES INC

1 patent

YU XIAOJUN

1 patent

CHIDAMBARRAO DURESETI

1 patent

MENTOR GRAPHICS CORP

1 patent

CHEN XIANGDONG

1 patent