Inventor

HIRABAYASHI KEISUKE

JP4 patents

⚠️ This page may combine multiple inventors who share the name “HIRABAYASHI KEISUKE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RENESAS ELECTRONICS CORP

2 patents

US7900177B2Mar 1, 2011

Method of processing dummy pattern based on boundary length and density of wiring pattern, semiconductor design apparatus and semiconductor device

RENESAS ELECTRONICS CORP13 citations87

US8365127B2Jan 29, 2013

Method of processing dummy pattern based on boundary length and density of wiring pattern, semiconductor design apparatus and semiconductor device

RENESAS ELECTRONICS CORP1 citations57

NAT UNIV CORP TOYOHASHI UNIV T

1 patent

US7692257B2Apr 6, 2010

Ultrasonic sensor comprising a metal/ferroelectric/metal/insulator/semiconductor structure

NAT UNIV CORP TOYOHASHI UNIV T5 citations55

HIRABAYASHI KEISUKE

1 patent

US8181142B2May 15, 2012

Method of processing dummy pattern based on boundary length and density of wiring pattern, semiconductor design apparatus and semiconductor device

HIRABAYASHI KEISUKE2 citations52