Inventor
BEGON FLORENT
FR22 patents
⚠️ This page may combine multiple inventors who share the name “BEGON FLORENT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED RISC MACH LTD
18 patentsUS7590826B2Sep 15, 2009
Speculative data value usage
ADVANCED RISC MACH LTD16 citations82
US7925868B2Apr 12, 2011
Suppressing register renaming for conditional instructions predicted as not executed
ADVANCED RISC MACH LTD18 citations81
US7624253B2Nov 24, 2009
Determining register availability for register renaming
ADVANCED RISC MACH LTD15 citations81
US10528355B2Jan 7, 2020
Handling move instructions via register renaming or writing to a different physical register using control flags
ADVANCED RISC MACH LTD4 citations71
US11086781B2Aug 10, 2021
Methods and apparatus for monitoring prefetcher accuracy information using a prefetch flag independently accessible from prefetch tag information
ADVANCED RISC MACH LTD5 citations66
US7600077B2Oct 6, 2009
Cache circuitry, data processing apparatus and method for handling write access requests
ADVANCED RISC MACH LTD6 citations60
US7568072B2Jul 28, 2009
Cache eviction
ADVANCED RISC MACH LTD3 citations60
US7552285B2Jun 23, 2009
Line fill techniques
ADVANCED RISC MACH LTD2 citations60
US11138119B2Oct 5, 2021
Increasing effective cache associativity
ADVANCED RISC MACH LTD0 citations59
US8352794B2Jan 8, 2013
Control of clock gating
ADVANCED RISC MACH LTD2 citations59
US7587556B2Sep 8, 2009
Store buffer capable of maintaining associated cache information
ADVANCED RISC MACH LTD2 citations59
US7533241B2May 12, 2009
Variable size cache memory support within an integrated circuit
ADVANCED RISC MACH LTD2 citations58
US12141069B2Nov 12, 2024
Prefetch store filtering
ADVANCED RISC MACH LTD1 citations56
US11900121B2Feb 13, 2024
Methods and apparatus for predicting instructions for execution
ADVANCED RISC MACH LTD0 citations51
US7941608B2May 10, 2011
Cache eviction
ADVANCED RISC MACH LTD0 citations50
US9513925B2Dec 6, 2016
Marking long latency instruction as branch in pending instruction table and handle as mis-predicted branch upon interrupting event to return to checkpointed state
ADVANCED RISC MACH LTD0 citations48
US9542194B2Jan 10, 2017
Speculative register file read suppression
ADVANCED RISC MACH LTD0 citations39
US7844800B2Nov 30, 2010
Method for renaming a large number of registers in a data processing system using a background channel
ADVANCED RISC MACH LTD0 citations38