Inventor

XIE YUANLIN

US23 patents

⚠️ This page may combine multiple inventors who share the name “XIE YUANLIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

XIE YUANLIN

ALTERA CORP

Embedded interposer with through-hole vias

Integrated circuit package with cavity in substrate

Integrated circuit package with embedded passive structures

Electronic package and method of forming the same

Method of optimizing interconnect distribution to improve signal integrity

BGA package with wiring schemes having reduced current loop paths to improve cross talk control and characteristic impedance

Consolidated flip chip BGA assembly process and apparatus

Tranmission line bridge interconnects

On-package edge-mount power decoupling and implementation with novel substrate design for FPGA and ASIC devices

Methods for packaging integrated circuits

Integrated circuit package with plated heat spreader

Enhanced ball grid array

Lead frame packaging technique with reduced noise and cross-talk

Power distribution network

Methods for packaging integrated circuits

Integrated circuit packages with detachable interconnect structures

Via structure and method for its fabrication

JIANG XIAOHONG

IC package with non-uniform dielectric layer thickness

LIU HUI

Power distribution network

XIE YUANLIN

Integrated circuit package with non-solder mask defined like pads

RAHMAN ARIFUR

Apparatus for stacked electronic circuitry and associated methods

KANG TECK-GYU

Electronic package with fluid flow barriers

CHANG LI-TIEN

Universal bump array structure