Inventor
NISHIO SEIICHI
JP4 patents
Patents
4 patentsUS6272667B1Aug 7, 2001
Method and apparatus for clock gated logic circuits to reduce electric power consumption
TOSHIBA KK48 citations95
US6668363B2Dec 23, 2003
Clock supplying circuit and method having enable buffer cells with first and second input terminals
TOSHIBA KK8 citations73
US4855726AAug 8, 1989
Signal tracing apparatus for logic circuit diagrams
TOSHIBA KK14 citations69
US6339751B1Jan 15, 2002
Circuit design support apparatus and a method
TOSHIBA KK3 citations61