P

Inventor

MAGUIRE DAVID J

US33 patents
⚠️ This page may combine multiple inventors who share the name “MAGUIRE DAVID J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

COMPAQ COMPUTER CORP

20 patents
US6279087B1Aug 21, 2001

System and method for maintaining coherency and improving performance in a bus bridge supporting write posting operations

COMPAQ COMPUTER CORP85 citations98
US6154798ANov 28, 2000

Computer system implementing hot docking and undocking capabilities by employing a local bus arbiter idle stats in which the arbiter is parked on a first input/output bus portion

COMPAQ COMPUTER CORP100 citations97
US6243817B1Jun 5, 2001

Device and method for dynamically reducing power consumption within input buffers of a bus interface unit

COMPAQ COMPUTER CORP55 citations96
US5774680AJun 30, 1998

Interfacing direct memory access devices to a non-ISA bus

COMPAQ COMPUTER CORP31 citations96
US5748911AMay 5, 1998

Serial bus system for shadowing registers

COMPAQ COMPUTER CORP38 citations93
US6356963B1Mar 12, 2002

Long latency interrupt handling and input/output write posting

COMPAQ COMPUTER CORP28 citations92
US6321307B1Nov 20, 2001

Computer system and method employing speculative snooping for optimizing performance

COMPAQ COMPUTER CORP45 citations92
US6088517AJul 11, 2000

Interfacing direct memory access devices to a non-ISA bus

COMPAQ COMPUTER CORP20 citations92
US5954809ASep 21, 1999

Circuit for handling distributed arbitration in a computer system having multiple arbiters

COMPAQ COMPUTER CORP29 citations92
US5873000AFeb 16, 1999

System incorporating hot docking and undocking capabilities without requiring a standby or suspend mode by placing local arbiters of system and base into idle state

COMPAQ COMPUTER CORP38 citations92
US5864688AJan 26, 1999

Apparatus and method for positively and subtractively decoding addresses on a bus

COMPAQ COMPUTER CORP27 citations92
US5781748AJul 14, 1998

Computer system utilizing two ISA busses coupled to a mezzanine bus

COMPAQ COMPUTER CORP27 citations92
US5761460AJun 2, 1998

Reconfigurable dual master IDE interface

COMPAQ COMPUTER CORP40 citations92
US5506997AApr 9, 1996

Device for mapping a set of interrupt signals generated on a first type bus to a set of interrupt signals defined by a second type bus and combing the mapped interrupt signals with a set of interrupt signals of the second type bus

COMPAQ COMPUTER CORP44 citations92
US6247087B1Jun 12, 2001

Bus system for shadowing registers

COMPAQ COMPUTER CORP8 citations74
US6108729AAug 22, 2000

Serial bus system for shadowing registers

COMPAQ COMPUTER CORP10 citations74
US5943500AAug 24, 1999

Long latency interrupt handling and input/output write posting

COMPAQ COMPUTER CORP15 citations74
US5793995AAug 11, 1998

Bus system for shadowing registers

COMPAQ COMPUTER CORP13 citations74
US5596725AJan 21, 1997

Fifo queue having replaceable entries

COMPAQ COMPUTER CORP12 citations74
US5673397ASep 30, 1997

FIFO queue having replaceable entries

COMPAQ COMPUTER CORP5 citations63

CONTITECH TRANSPORTBANDSYSTEME

3 patents

INTEL NE INC

2 patents

UNIV GRIFFITH

1 patent

KEELS KENNETH G

1 patent

STEMCO KAISER INC

1 patent

VEYANCE TECHNOLOGIES INC

1 patent

GOODYEAR TIRE & RUBBER

1 patent

GILG DOUGLAS M

1 patent

STEMCO PRODUCTS INC

1 patent

HAMILTON JOHN S

1 patent