Inventor

MISHRA PARMANAND

US49 patents

⚠️ This page may combine multiple inventors who share the name “MISHRA PARMANAND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MISHRA PARMANAND

INPHI CORP

SerDes with high-bandwith low-latency clock and data recovery

Continuous time linear equalizer with two adaptive zero frequency locations

Input termination circuits for high speed receivers

Variable gain amplifiers for communication systems

Compact high speed duty cycle corrector

Differential circuits with constant GM bias

High-speed clock skew correction for serdes receivers

Charge pump circuits for clock and data recovery

Offset-compensated loss of signal detection methods and systems

Frequency acquisition for SERDES receivers

Data rate programming using source degenerated CTLE

Continuous time linear equalization for current-mode logic with transformer

High-speed linear charge pump circuits for clock data recovery

Variable gain amplifiers for communication systems

Input termination circuits for high speed receivers

Compact high speed duty cycle corrector

Method and system for calibrating equalizers

Low voltage high speed CMOS line driver without tail current source

Serdes with high-bandwith low-latency clock and data recovery

Offset correction for sense amplifier

Charge pump circuits for clock and data recovery

CMOS interpolator for a serializer/deserializer communication application

Continuous time linear equalization for current-mode logic with transformer

Loss of signal detection on CDR

Offset correction for sense amplifier

Serializer/deserializer apparatus with loopback configuration and methods thereof

Input termination circuits for high speed receivers

Variable gain amplifiers for communication systems

Method and system for calibrating equalizers

Continuous time linear equalizer with two adaptive zero frequency locations

Loss of signal detection on CDR

Compact high speed duty cycle corrector

Low voltage high speed CMOS line driver without tail current source

Differential circuits with constant GM bias

Loss of signal detection on CDR

High-speed clock skew correction for SERDES receivers

High-speed clock skew correction for serdes receivers

Charge pump circuits for clock and data recovery

Offset-compensated loss of signal detection methods and systems

CMOS interpolator for a serializer/deserializer communication application

Frequency acquisition for serdes receivers

Frequency acquisition for serdes receivers

Data rate programming using source degenerated CTLE

Serializer/deserializer apparatus with loopback configuration and methods thereof

Serializer/deserializer apparatus with loopback configuration and methods thereof

Continuous time linear equalization for current-mode logic with transformer

MARVELL ASIA PTE LTD

Clock data recovery circuit including charge pump having reduced glitch current

Termination circuits and attenuation methods thereof

PMC SIERRA INC

Reduction of electromagnetic interference for differential signals