Inventor
DELLINGER ERIC F
US13 patents
Patents
13 patentsUS6457164B1Sep 24, 2002
Hetergeneous method for determining module placement in FPGAs
XILINX INC103 citations97
US6292925B1Sep 18, 2001
Context-sensitive self implementing modules
XILINX INC90 citations97
US6216258B1Apr 10, 2001
FPGA modules parameterized by expressions
XILINX INC84 citations97
US6205574B1Mar 20, 2001
Method and system for generating a programming bitstream including identification bits
XILINX INC84 citations97
US6260182B1Jul 10, 2001
Method for specifying routing in a logic module by direct module communication
XILINX INC70 citations96
US6243851B1Jun 5, 2001
Heterogeneous method for determining module placement in FPGAs
XILINX INC71 citations96
US9859896B1Jan 2, 2018
Distributed multi-die routing in a multi-chip module
XILINX INC52 citations94
US6237129B1May 22, 2001
Method for constraining circuit element positions in structured layouts
XILINX INC34 citations92
US12307217B1May 20, 2025
Dynamic adjustment of floating point exponent bias for exponent compression
XILINX INC3 citations74
US11216275B1Jan 4, 2022
Converting floating point data into integer data using a dynamically adjusted scale factor
XILINX INC6 citations74
US10042806B2Aug 7, 2018
System-level interconnect ring for a programmable integrated circuit
XILINX INC3 citations72
US11824564B1Nov 21, 2023
Lossless compression using subnormal floating point values
XILINX INC0 citations62
US10715149B1Jul 14, 2020
Configurable logic block (CLB) internal routing architecture for enhanced local routing and clocking improvements
XILINX INC0 citations38