Inventor
PACKAN PAUL A
US12 patents
Patents
12 patentsUS6326664B1Dec 4, 2001
Transistor with ultra shallow tip and method of fabrication
INTEL CORP128 citations98
US5710450AJan 20, 1998
Transistor with ultra shallow tip and method of fabrication
INTEL CORP199 citations98
US5976939ANov 2, 1999
Low damage doping technique for self-aligned source and drain regions
INTEL CORP54 citations96
US6020244AFeb 1, 2000
Channel dopant implantation with automatic compensation for variations in critical dimension
INTEL CORP75 citations94
US7312485B2Dec 25, 2007
CMOS fabrication process utilizing special transistor orientation
INTEL CORP21 citations92
US6800887B1Oct 5, 2004
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
INTEL CORP17 citations92
US7226824B2Jun 5, 2007
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
INTEL CORP11 citations84
US7187057B2Mar 6, 2007
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
INTEL CORP7 citations74
US7888710B2Feb 15, 2011
CMOS fabrication process utilizing special transistor orientation
INTEL CORP3 citations63
US11664452B2May 30, 2023
Diffused tip extension transistor
INTEL CORP0 citations59
US10872977B2Dec 22, 2020
Diffused tip extension transistor
INTEL CORP0 citations49
US10304956B2May 28, 2019
Diffused tip extension transistor
INTEL CORP0 citations49