Inventor

CHEN MINHAN

US24 patents

⚠️ This page may combine multiple inventors who share the name “CHEN MINHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN MINHAN

MICROSOFT TECHNOLOGY LICENSING LLC

Calibrating a phase interpolator by amplifying timing differences

Phase-locked loops (PLL), including time-to-digital converter (TDC) gain calibration circuits and related methods

Digital phase-locked loops (PLL) including closed-loop time-to-digital converter (TDC) gain calibration circuits and related methods

Phase interpolator (PI) with clamping circuit to limit operation to range having optimal integral non-linearity and related methods

Peak voltage amplitude detectors tolerant to process variation and device mismatch and related methods

Phase interpolator (PI) including weighted summing circuit and related methods

Time-to-digital converters (TDC) employing a single-stage delay pair and noise shaping for wide input range and reduced quantization noise in a phase-locked loop (PLL)

Time to digital converter (TDC) circuit with self-adaptive time granularity and related methods

QUALCOMM INC

Offset calibration for low power and high performance receiver

Offset nulling for high-speed sense amplifier

Accurate sample latch offset compensation scheme

Receiver with cancellation of intrinsic offset from decision feedback equalization to enhance data margin

Low-power, low-latency time-to-digital-converter-based serial link

Apparatus and method for calibrating a receiver with a decision feedback equalizer (DFE)

Offset calibration for low power and high performance receiver

IBM

Differential amplifier offset voltage minimization independently from common mode voltage adjustment

Signal detector with calibration circuit arrangement

Dynamically calibrating the offset of a receiver with a decision feedback equalizer (DFE) while performing data transport operations

Testing a decision feedback equalizer (‘DFE’)

Testing a decision feedback equalizer (‘DFE’)

Decision feedback equalizer (‘DFE’) with a plurality of independently-controlled isolated power domains

LATTICE SEMICONDUCTOR CORP

Clock signal selection system, method of generating a clock signal and programmable clock manager including same

CHEN MINHAN

Serial link receiver for handling high speed transmissions

QI JIEMING

Variable gain amplifier with reduced power consumption