Inventor

TAKATORI ATSUO

JP3 patents

⚠️ This page may combine multiple inventors who share the name “TAKATORI ATSUO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FUJITSU SEMICONDUCTOR LTD

1 patent

US7952390B2May 31, 2011

Logic circuit having gated clock buffer

FUJITSU SEMICONDUCTOR LTD17 citations79

TOSHIBA KK

1 patent

US8051403B2Nov 1, 2011

Delay fault test quality calculation apparatus, delay fault test quality calculation method, and delay fault test pattern generation apparatus

TOSHIBA KK3 citations59

NOZUYAMA YASUYUKI

1 patent

US8185863B2May 22, 2012

Delay fault test quality calculation apparatus, delay fault test quality calculation method, and delay fault test pattern generation apparatus

NOZUYAMA YASUYUKI0 citations47