Inventor

FAN WEN-JENG

TW41 patents

⚠️ This page may combine multiple inventors who share the name “FAN WEN-JENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FAN WEN-JENG

POWERTECH TECHNOLOGY INC

Pillar-to-pillar flip-chip assembly

Method for fabricating wafer level chip scale packages

Semiconductor package having plural chips side by side arranged on a leadframe

Semiconductor package-on-package (POP) device avoiding crack at solder joints of micro contacts during package stacking

Semiconductor device with stacking chips

Semiconductor package having stepwise depression in substrate

Leadframe-based semiconductor package

Semiconductor package with a conductive casing for heat dissipation and electromagnetic interference (EMI) shield and manufacturing method thereof

Semiconductor packaging method to save interposer

Semiconductor device package with reinforced redistribution layer

Semiconductor package and manufacturing method thereof

Laminate substrate and semiconductor package utilizing the substrate

Circuit board ready to slot

POP (package-on-package) semiconductor device

Substrate and semiconductor package for lessening warpage

COL (Chip-On-Lead) multi-chip package

Method for forming a die-attach layer during semiconductor packaging processes

Substrate improving immobilization of ball pads for BGA packages

Semiconductor package having isolated inner lead

Mold array process for semiconductor packages

POP (package-on-package) device encapsulating soldered joints between external leads

IC package with a protective encapsulant and a stiffening encapsulant

Window type BGA semiconductor package and its substrate

Semiconductor package with conductive via in encapsulation connecting to conductive element

Substrate-less package structure

Package structure

Substrate panel having a plurality of substrate strips for semiconductor packages

Wafer level packaging method

Substrate strip for semiconductor packages

Wiring substrate with improvement in tensile strength of traces

Leadframe-type semiconductor package having EMI shielding layer connected to ground

Semiconductor device with wire-bonding on multi-zigzag fingers

Lead-on-chip semiconductor package and leadframe for the package

Semiconductor package with leads on a chip having multi-row of bonding pads

Semiconductor package utilizing tape to reinforce fixing of leads to die pad

Method and device of pop stacking for preventing bridging of interposer solder balls

Stacked assembly of semiconductor packages with fastening lead-cut ends of leadframe

FAN WEN-JENG

Method for forming an EMI shielding layer on all surfaces of a semiconductor package

Multi-chip stacked package and its mother chip to save interposer

Lead frame package structure for side-by-side disposed chips

Method for forming an isolated inner lead from a leadframe