Inventor
TAKAYA SOICHI
JP11 patents
Patents
11 patentsUS5852728ADec 22, 1998
Uninterruptible clock supply apparatus for fault tolerant computer system
HITACHI LTD76 citations95
US5003458AMar 26, 1991
Suspended instruction restart processing system based on a checkpoint microprogram address
HITACHI LTD31 citations92
US5146569ASep 8, 1992
System for storing restart address of microprogram, determining the validity, and using valid restart address to resume execution upon removal of suspension
HITACHI LTD29 citations91
US6032265AFeb 29, 2000
Fault-tolerant computer system
HITACHI LTD18 citations80
US5551007AAug 27, 1996
Method for controlling multiple common memories and multiple common memory system
HITACHI LTD11 citations73
US5029073AJul 2, 1991
Method for fast establishing a co-processor to memory linkage by main processor
HITACHI LTD17 citations73
US4967339AOct 30, 1990
Operation control apparatus for a processor having a plurality of arithmetic devices
HITACHI LTD11 citations73
US4841439AJun 20, 1989
Method for restarting execution interrupted due to page fault in a data processing system
HITACHI LTD18 citations73
US4764869AAug 16, 1988
Method and apparatus for controlling interruption in the course of instruction execution in a processor
HITACHI LTD17 citations73
US4849876AJul 18, 1989
Address translation circuit including two translation buffers
HITACHI LTD9 citations72
US5737513AApr 7, 1998
Method of and system for verifying operation concurrence in maintenance/replacement of twin CPUs
HITACHI LTD10 citations69