Inventor
RAO T V CHANAKYA
IN3 patents
Patents
3 patentsUS7830200B2Nov 9, 2010
High voltage tolerant bias circuit with low voltage transistors
CYPRESS SEMICONDUCTOR CORP8 citations80
US7755419B2Jul 13, 2010
Low power beta multiplier start-up circuit and method
CYPRESS SEMICONDUCTOR CORP9 citations80
US7994848B2Aug 9, 2011
Low power voltage reference circuit
CYPRESS SEMICONDUCTOR CORP12 citations77