Inventor

EL-BARAJI MOURAD

US49 patents

⚠️ This page may combine multiple inventors who share the name “EL-BARAJI MOURAD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

EL-BARAJI MOURAD

SPIN TRANSFER TECH INC

Method and apparatus for bipolar memory write-verify

Method and apparatus for bipolar memory write-verify

Perpendicular source and bit lines for an MRAM array

Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank

Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers

Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device

Memory device using levels of dynamic redundancy registers for writing a data word that failed a write operation

Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them

Memory array with individually trimmable sense amplifiers

Memory instruction pipeline with an additional write stage in a memory device that uses dynamic redundancy registers

Smart cache design to prevent overflow for a memory device with a dynamic redundancy register

Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers

Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register

Method of reading data from a memory device using multiple levels of dynamic redundancy registers

Device with dynamic redundancy registers

Memory device with a plurality of memory banks where each memory bank is associated with a corresponding memory instruction pipeline and a dynamic redundancy register

Memory array with horizontal source line and sacrificial bitline per virtual source

Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device

SPIN MEMORY INC

AC current write-assist in orthogonal STT-MRAM

Microwave write-assist in series-interconnected orthogonal STT-MRAM devices

Systems and methods utilizing serial configurations of magnetic memory devices

Systems and methods utilizing parallel configurations of magnetic memory devices

AC current pre-charge write-assist in orthogonal STT-MRAM

Microwave write-assist in orthogonal STT-MRAM

Systems and methods utilizing serial and parallel configurations of magnetic memory devices

Read-out techniques for multi-bit cells

Multi-bit cell read-out techniques

Memory array with individually trimmable sense amplifiers

Memory array with horizontal source line and a virtual source line

On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects

Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques

Multi-port random access memory

EL BARAJI MOURAD

Method for writing in a MRAM-based memory device with reduced power consumption

Circuit for generating adjustable timing signals for sensing a self-referenced MRAM cell

Magnetic random access memory devices including shared heating straps

Magnetic random access memory devices including multi-bit cells

Magnetic random access memory devices including multi-bit cells

BERGER NEAL

MRAM-based memory device with rotated gate

Magnetic random access memory devices configured for self-referenced read operation

Non-volatile logic devices using magnetic tunnel junctions

Memory devices with series-interconnected magnetic random access memory cells

JAVERLIAC VIRGILE

Ternary Content Addressable Magnetoresistive random access memory cell

Active strap magnetic random access memory cells configured to perform thermally-assisted writing

Ultimate magnetic random access memory-based ternary cam

CAMBOU BERTRAND F

Apparatus, system, and method for matching patterns with an ultra fast check engine

Apparatus, system, and method for matching patterns with an ultra fast check engine based on flash cells

CROCUS TECHNOLOGY INC

Memory devices with magnetic random access memory (MRAM) cells and associated structures for connecting the MRAM cells

Memory devices with magnetic random access memory (MRAM) cells and associated structures for connecting the MRAM cells

AVALANCHE TECHNOLOGY INC

Fast programming of magnetic random access memory (MRAM)