Inventor
FALLON ELIAS LEE
US9 patents
Patents
9 patentsUS11562110B1Jan 24, 2023
System and method for device mismatch contribution computation for non-continuous circuit outputs
CADENCE DESIGN SYSTEMS INC2 citations72
US11048852B1Jun 29, 2021
System, method and computer program product for automatic generation of sizing constraints by reusing existing electronic designs
CADENCE DESIGN SYSTEMS INC4 citations72
US11275882B1Mar 15, 2022
System, method, and computer program product for group and isolation prediction using machine learning and applications in analog placement and sizing
CADENCE DESIGN SYSTEMS INC2 citations70
US11087060B1Aug 10, 2021
System, method, and computer program product for the integration of machine learning predictors in an automatic placement associated with an electronic design
CADENCE DESIGN SYSTEMS INC6 citations70
US11003825B1May 11, 2021
System, method, and computer program product for optimization in an electronic design
CADENCE DESIGN SYSTEMS INC6 citations70
US11620548B1Apr 4, 2023
System, method, and computer program product for predicting parasitics in an electronic design
CADENCE DESIGN SYSTEMS INC4 citations68
US12045730B1Jul 23, 2024
System, method, and computer program product for analog and mix-signal circuit placement
CADENCE DESIGN SYSTEMS INC1 citations61
US11544574B1Jan 3, 2023
System, method, and computer program product for analog structure prediction associated with an electronic design
CADENCE DESIGN SYSTEMS INC0 citations61
US11275881B1Mar 15, 2022
System, method, and computer program product for genetic routing in an electronic circuit design
CADENCE DESIGN SYSTEMS INC1 citations57