P

Inventor

SLEGEL TIMOTHY

US34 patents

Patents

34 patents
US11269632B1Mar 8, 2022

Data conversion to/from selected data type with implied rounding mode

IBM7 citations84
US10630312B1Apr 21, 2020

General-purpose processor instruction to perform compression/decompression operations

IBM8 citations83
US10831478B2Nov 10, 2020

Sort and merge instruction for a general-purpose processor

IBM3 citations73
US11693692B2Jul 4, 2023

Program event recording storage alteration processing for a neural network accelerator instruction

IBM2 citations72
US10831497B2Nov 10, 2020

Compression/decompression instruction specifying a history buffer to be used in the compression/decompression of data

IBM2 citations72
US12468444B2Nov 11, 2025

System level testing of artificial intelligence primitives

IBM0 citations62
US12423451B2Sep 23, 2025

Move data and set storage key based on key function control

IBM0 citations62
US12111740B2Oct 8, 2024

System level testing of artificial intelligence primitives

IBM1 citations62
US12008395B2Jun 11, 2024

Program event recording storage alteration processing for a neural network accelerator instruction

IBM0 citations62
US11442726B1Sep 13, 2022

Vector pack and unpack instructions

IBM1 citations62
US11281469B2Mar 22, 2022

Saving and restoring machine state between multiple executions of an instruction

IBM0 citations62
US11209992B2Dec 28, 2021

Detection of alteration of storage keys used to protect memory

IBM0 citations62
US11061685B2Jul 13, 2021

Extended asynchronous data mover functions compatibility indication

IBM0 citations62
US11031951B2Jun 8, 2021

Verifying the correctness of a deflate compression accelerator

IBM0 citations62
US11809870B2Nov 7, 2023

Function virtualization facility for blocking instruction function of a multi-function instruction of a virtual processor

IBM0 citations59
US11086624B2Aug 10, 2021

Function virtualization facility for blocking instruction function of a multi-function instruction of a virtual processor

IBM0 citations59
US12561197B2Feb 24, 2026

Recovering from an error during a cryptographic operation running asynchronous to a core pipeline

IBM0 citations52
US12393399B2Aug 19, 2025

Controlling storage accesses for merge operations

IBM0 citations52
US10838631B2Nov 17, 2020

Detection of alteration of storage keys used to protect memory

IBM0 citations52
US10831503B2Nov 10, 2020

Saving and restoring machine state between multiple executions of an instruction

IBM0 citations52
US9898294B2Feb 20, 2018

Selectively blocking branch prediction for a predetermined number of instructions

IBM0 citations52
US12430127B1Sep 30, 2025

Vector test decimal instruction for validity testing

IBM0 citations51
US11669331B2Jun 6, 2023

Neural network processing assist instruction

IBM0 citations51
US11531546B2Dec 20, 2022

Hexadecimal floating point multiply and add instruction

IBM0 citations51
US11449367B2Sep 20, 2022

Functional completion when retrying a non-interruptible instruction in a bi-modal execution environment

IBM0 citations51
US10831479B2Nov 10, 2020

Instruction to move data in a right-to-left direction

IBM0 citations51
US12079658B2Sep 3, 2024

Detection of invalid machine-specific data types during data conversion

IBM0 citations50
US11734013B2Aug 22, 2023

Exception summary for invalid values detected during instruction execution

IBM0 citations50
US11675592B2Jun 13, 2023

Instruction to query for model-dependent information

IBM0 citations50
US12013791B2Jun 18, 2024

Reset dynamic address translation protection instruction

IBM0 citations49
US11593275B2Feb 28, 2023

Operating system deactivation of storage block write protection absent quiescing of processors

IBM0 citations49
US10831502B2Nov 10, 2020

Migration of partially completed instructions

IBM0 citations42
US10831480B2Nov 10, 2020

Move data and set storage key instruction

IBM0 citations41
US10387311B2Aug 20, 2019

Cache directory that determines current state of a translation in a microprocessor core cache

IBM0 citations40