Inventor
JORDY GEORGE J
US4 patents
Patents
4 patentsUS4798976AJan 17, 1989
Logic redundancy circuit scheme
IBM26 citations88
US4689772AAug 25, 1987
Read complete test technique for memory arrays
IBM7 citations70
US4675846AJun 23, 1987
Random access memory
IBM1 citations49
US4635228AJan 6, 1987
Random access memory employing unclamped complementary transistor switch (CTS) memory cells and utilizing word to drain line diode shunts
IBM1 citations49