Inventor
LIM CHONG WEE
US10 patents
⚠️ This page may combine multiple inventors who share the name “LIM CHONG WEE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CHARTERED SEMICONDUCTOR MFG
7 patentsUS6228727B1May 8, 2001
Method to form shallow trench isolations with rounded corners and reduced trench oxide recess
CHARTERED SEMICONDUCTOR MFG142 citations97
US6350661B2Feb 26, 2002
Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts
CHARTERED SEMICONDUCTOR MFG49 citations95
US6265302B1Jul 24, 2001
Partially recessed shallow trench isolation method for fabricating borderless contacts
CHARTERED SEMICONDUCTOR MFG77 citations95
US6165871ADec 26, 2000
Method of making low-leakage architecture for sub-0.18 μm salicided CMOS device
CHARTERED SEMICONDUCTOR MFG55 citations95
US6297126B1Oct 2, 2001
Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts
CHARTERED SEMICONDUCTOR MFG20 citations92
US6271133B1Aug 7, 2001
Optimized Co/Ti-salicide scheme for shallow junction deep sub-micron device fabrication
CHARTERED SEMICONDUCTOR MFG36 citations92
US6093628AJul 25, 2000
Ultra-low sheet resistance metal/poly-si gate for deep sub-micron CMOS application
CHARTERED SEMICONDUCTOR MFG41 citations90
UNIV ILLINOIS
3 patentsUS6797598B2Sep 28, 2004
Method for forming an epitaxial cobalt silicide layer on MOS devices
UNIV ILLINOIS8 citations68
US6846359B2Jan 25, 2005
Epitaxial CoSi2 on MOS devices
UNIV ILLINOIS5 citations59
US6762131B2Jul 13, 2004
Method for large-scale fabrication of atomic-scale structures on material surfaces using surface vacancies
UNIV ILLINOIS3 citations59