Inventor
MAY ROBERT A
US63 patents
⚠️ This page may combine multiple inventors who share the name “MAY ROBERT A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FORTINET INC
22 patentsUS10791146B2Sep 29, 2020
Network security framework based scoring metric generation and sharing
FORTINET INC4 citations84
US9647988B2May 9, 2017
Policy-based configuration of internet protocol security for a virtual private network
FORTINET INC4 citations84
US9503477B2Nov 22, 2016
Network policy assignment based on user reputation score
FORTINET INC8 citations84
US9313183B2Apr 12, 2016
Policy-based configuration of internet protocol security for a virtual private network
FORTINET INC4 citations84
US12081400B2Sep 3, 2024
Systems and methods for SD-WAN setup automation
FORTINET INC2 citations73
US10841341B2Nov 17, 2020
Policy-based configuration of internet protocol security for a virtual private network
FORTINET INC1 citations73
US10448244B2Oct 15, 2019
Deployment and configuration of access points
FORTINET INC2 citations73
US9894034B2Feb 13, 2018
Automated configuration of endpoint security management
FORTINET INC4 citations73
US10841279B2Nov 17, 2020
Learning network topology and monitoring compliance with security goals
FORTINET INC2 citations68
US10686839B2Jun 16, 2020
Building a cooperative security fabric of hierarchically interconnected network security devices
FORTINET INC2 citations68
US12574288B2Mar 10, 2026
Systems and methods for SD-WAN setup automation
FORTINET INC0 citations62
US12432123B2Sep 30, 2025
Systems and methods for automated incident management
FORTINET INC0 citations62
US12149540B2Nov 19, 2024
Systems and methods for identifying security requirements in a ZTNA system
FORTINET INC1 citations62
US12101231B1Sep 24, 2024
Systems and methods for automated incident management
FORTINET INC1 citations62
US12069187B2Aug 20, 2024
Systems and methods for posture checking across local network zone ZTNA control
FORTINET INC1 citations62
US11019029B2May 25, 2021
Building a cooperative security fabric of hierarchically interconnected network security devices
FORTINET INC0 citations61
US11475790B2Oct 18, 2022
Gamified network security training using dedicated virtual environments simulating a deployed network topology of network security products
FORTINET INC1 citations56
US11770403B2Sep 26, 2023
Determination of a security rating of a network element
FORTINET INC0 citations54
US11425158B2Aug 23, 2022
Determination of a security rating of a network element
FORTINET INC0 citations54
US12476937B2Nov 18, 2025
Systems and methods for cloud based root service application across multiple cooperative security fabrics
FORTINET INC0 citations52
US11909826B1Feb 20, 2024
Systems and methods for four dimensional network session authorization
FORTINET INC0 citations52
US10594708B2Mar 17, 2020
Providing security in a communication network
FORTINET INC0 citations52
INTEL CORP
20 patentsUS10727185B2Jul 28, 2020
Multi-chip package with high density interconnects
INTEL CORP11 citations86
US11393766B2Jul 19, 2022
Multi-chip package with high density interconnects
INTEL CORP3 citations73
US11101222B2Aug 24, 2021
Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers
INTEL CORP4 citations71
US11251113B2Feb 15, 2022
Methods of embedding magnetic structures in substrates
INTEL CORP2 citations70
US12218069B2Feb 4, 2025
Multi-chip package with high density interconnects
INTEL CORP0 citations63
US11908802B2Feb 20, 2024
Multi-chip package with high density interconnects
INTEL CORP0 citations63
US11908821B2Feb 20, 2024
Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging
INTEL CORP0 citations63
US11264239B2Mar 1, 2022
Polarization defined zero misalignment vias for semiconductor packaging
INTEL CORP0 citations63
US11264346B2Mar 1, 2022
Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging
INTEL CORP0 citations63
US11574874B2Feb 7, 2023
Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch
INTEL CORP0 citations62
US11552010B2Jan 10, 2023
Dielectric for high density substrate interconnects
INTEL CORP0 citations62
US12218071B2Feb 4, 2025
Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers
INTEL CORP0 citations61
US11735531B2Aug 22, 2023
Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers
INTEL CORP0 citations61
US11264307B2Mar 1, 2022
Dual-damascene zero-misalignment-via process for semiconductor packaging
INTEL CORP0 citations61
US11862552B2Jan 2, 2024
Methods of embedding magnetic structures in substrates
INTEL CORP0 citations60
US11721631B2Aug 8, 2023
Via structures having tapered profiles for embedded interconnect bridge substrates
INTEL CORP0 citations59
US11373951B2Jun 28, 2022
Via structures having tapered profiles for embedded interconnect bridge substrates
INTEL CORP0 citations59
US11272619B2Mar 8, 2022
Apparatus with embedded fine line space in a cavity, and a method for forming the same
INTEL CORP0 citations59
US10453812B2Oct 22, 2019
Polarization defined zero misalignment vias for semiconductor packaging
INTEL CORP0 citations52
US10121679B1Nov 6, 2018
Package substrate first-level-interconnect architecture
INTEL CORP1 citations52
MAY FABRICATING CO INC
2 patentsCHALIPARAMBIL KISHORE R
2 patents(unassigned)
1 patentMAY ROBERT A
1 patentMAY FABRICATING COMPANY INC
1 patentMAY FABRICATING COMPANY
1 patentShowing the top 50 of 63 patents by PatentIndex Score.