Inventor

BOYAPATI SRI RANGA SAI

US63 patents

⚠️ This page may combine multiple inventors who share the name “BOYAPATI SRI RANGA SAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BOYAPATI SRI RANGA SAI

INTEL CORP

Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same

Multi-chip package with high density interconnects

Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same

Integration of embedded thin film capacitors in package substrates

Electromigration resistant and profile consistent contact arrays

Inorganic interposer for multi-chip packaging

Microelectronic device with embedded die substrate on interposer

Multi-chip package with high density interconnects

In-package RF waveguides as high bandwidth chip-to-chip interconnects and methods for using the same

Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same

Methods of forming substrate microvias with anchor structures

Substrate with variable height conductive and dielectric elements

Thin film barrier seed metallization in magnetic-plugged through hole inductor

Electromigration resistant and profile consistent contact arrays

Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling

Package substrates with integral devices

Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers

Surface finishes with low rBTV for fine and mixed bump pitch architectures

Enabling magnetic films in inductors integrated into semiconductor packages

Multi-chip package with high density interconnects

Multi-chip package with high density interconnects

Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging

In-package RF waveguides as high bandwidth chip-to-chip interconnects and methods for using the same

Polarization defined zero misalignment vias for semiconductor packaging

Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging

Aluminum oxide for thermal management or adhesion

Faraday rotator interconnect as a through-via configuration in a patch architecture

Magneto-optical Kerr effect interconnects for photonic packaging

Integrated circuit package supports

Microelectronic device with embedded die substrate on interposer

Microelectronic device with embedded die substrate on interposer

Patch accommodating embedded dies having different thicknesses

Integrated circuit package supports

Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same

Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch

Dielectric for high density substrate interconnects

Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling

Integrated circuit package supports

Semiconductor package having a coaxial first layer interconnect

Package substrate having copper alloy sputter seed layer and high density interconnects

Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers

Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers

Dual-damascene zero-misalignment-via process for semiconductor packaging

Surface finishes with low RBTV for fine and mixed bump pitch architectures

Apparatus with embedded fine line space in a cavity, and a method for forming the same

Package substrate having polymer-derived ceramic core

Polarization defined zero misalignment vias for semiconductor packaging

Package substrate first-level-interconnect architecture

SANKMAN ROBERT L

Integration of embedded thin film capacitors in package substrates

TAHOE RES LTD

Electromigration resistant and profile consistent contact arrays