Inventor
DE JONG JAN L
US21 patents
⚠️ This page may combine multiple inventors who share the name “DE JONG JAN L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
17 patentsUS7312625B1Dec 25, 2007
Test circuit and method of use thereof for the manufacture of integrated circuits
XILINX INC22 citations92
US7139190B1Nov 21, 2006
Single event upset tolerant memory cell layout
XILINX INC34 citations92
US7453311B1Nov 18, 2008
Method and apparatus for compensating for process variations
XILINX INC32 citations91
US7515452B1Apr 7, 2009
Interleaved memory cell with single-event-upset tolerance
XILINX INC23 citations90
US6982451B1Jan 3, 2006
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
XILINX INC15 citations84
US6868537B1Mar 15, 2005
Method of generating an IC mask using a reduced database
XILINX INC14 citations82
US7638822B1Dec 29, 2009
Memory cell with single-event-upset tolerance
XILINX INC14 citations81
US7002219B1Feb 21, 2006
Electrical fuse for integrated circuits
XILINX INC18 citations81
US7948791B1May 24, 2011
Memory array and method of implementing a memory array
XILINX INC6 citations73
US7053652B1May 30, 2006
Static memory cell circuit with single bit line and set/reset write function
XILINX INC9 citations73
US6740936B1May 25, 2004
Ballast resistor with reduced area for ESD protection
XILINX INC12 citations73
US6867580B1Mar 15, 2005
Structures and methods for determining the effects of high stress currents on conducting layers and contacts in integrated circuits
XILINX INC5 citations72
US6727710B1Apr 27, 2004
Structures and methods for determining the effects of high stress currents on conducting layers and contacts in integrated circuits
XILINX INC8 citations72
US7452765B1Nov 18, 2008
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
XILINX INC3 citations62
US7429867B1Sep 30, 2008
Circuit for and method of detecting a defect in a component formed in a substrate of an integrated circuit
XILINX INC4 citations62
US7109751B1Sep 19, 2006
Methods of implementing phase shift mask compliant static memory cell circuits
XILINX INC3 citations62
US6842019B1Jan 11, 2005
Structures and methods for determining the effects of high stress currents on conducting layers and contacts in integrated circuits
XILINX INC1 citations61