Inventor
CHUANG CHITA
TW50 patents
⚠️ This page may combine multiple inventors who share the name “CHUANG CHITA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
31 patentsUS10784223B2Sep 22, 2020
Elongated bump structures in package structure
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US10290600B2May 14, 2019
Dummy flip chip bumps for reducing stress
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations84
US9881885B2Jan 30, 2018
Metal routing architecture for integrated circuits
TAIWAN SEMICONDUCTOR MFG CO LTD11 citations84
US9472521B2Oct 18, 2016
Scheme for connector site spacing and resulting structures
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US9406629B2Aug 2, 2016
Semiconductor package structure and manufacturing method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD8 citations83
US11088102B2Aug 10, 2021
Bonded structures for package and substrate
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10692848B2Jun 23, 2020
Stress reduction apparatus and method
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10515917B2Dec 24, 2019
Bump on pad (BOP) bonding structure in semiconductor packaged device
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US10468366B2Nov 5, 2019
Bonded structures for package and substrate
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US9741589B2Aug 22, 2017
Substrate pad structure
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US9711477B2Jul 18, 2017
Dummy flip chip bumps for reducing stress
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US9673125B2Jun 6, 2017
Interconnection structure
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US9673161B2Jun 6, 2017
Bonded structures for package and substrate
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US9646943B1May 9, 2017
Connector structure and method of forming same
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US9053990B2Jun 9, 2015
Bump interconnection techniques
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations73
US10037973B2Jul 31, 2018
Method for manufacturing semiconductor package structure
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations72
US11855025B2Dec 26, 2023
Semiconductor device and package assembly including the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US11824026B2Nov 21, 2023
Connector structure and method of forming same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US11631993B2Apr 18, 2023
Wireless charging devices having wireless charging coils and methods of manufacture thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US12113055B2Oct 8, 2024
Stress reduction apparatus and method
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11244940B2Feb 8, 2022
Stress reduction apparatus and method
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US10867810B2Dec 15, 2020
Substrate pad structure
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10861811B2Dec 8, 2020
Connector structure and method of forming same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10748785B2Aug 18, 2020
Substrate pad structure
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10734347B2Aug 4, 2020
Dummy flip chip bumps for reducing stress
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10720788B2Jul 21, 2020
Wireless charging devices having wireless charging coils and methods of manufacture thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10388620B2Aug 20, 2019
Connector structure and method of forming same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10163839B2Dec 25, 2018
Bump on pad (BOP) bonding structure in semiconductor packaged device
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9786621B2Oct 10, 2017
Elongated bump structures in package structure
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9748188B2Aug 29, 2017
Method of forming a bump on pad (BOP) bonding structure in a semiconductor packaged device
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10483225B2Nov 19, 2019
Packaging assembly and method of making the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
TAIWAN SEMICONDUCTOR MFG
10 patentsUS9224688B2Dec 29, 2015
Metal routing architecture for integrated circuits
TAIWAN SEMICONDUCTOR MFG17 citations93
US9117825B2Aug 25, 2015
Substrate pad structure
TAIWAN SEMICONDUCTOR MFG12 citations92
US8829673B2Sep 9, 2014
Bonded structures for package and substrate
TAIWAN SEMICONDUCTOR MFG17 citations92
US9287234B2Mar 15, 2016
Dummy flip chip bumps for reducing stress
TAIWAN SEMICONDUCTOR MFG10 citations84
US9397059B2Jul 19, 2016
Bonded structures for package and substrate
TAIWAN SEMICONDUCTOR MFG4 citations73
US9196573B2Nov 24, 2015
Bump on pad (BOP) bonding structure
TAIWAN SEMICONDUCTOR MFG2 citations63
US9159695B2Oct 13, 2015
Elongated bump structures in package structure
TAIWAN SEMICONDUCTOR MFG3 citations63
US8772950B2Jul 8, 2014
Methods and apparatus for flip chip substrate with guard rings outside of a die attach region
TAIWAN SEMICONDUCTOR MFG3 citations63
US9123788B2Sep 1, 2015
Bonded structures for package and substrate
TAIWAN SEMICONDUCTOR MFG1 citations62
US9040350B2May 26, 2015
Packaging and function tests for package-on-package and system-in-package structures
TAIWAN SEMICONDUCTOR MFG0 citations52