Inventor

GHOSH SANTOSH

US84 patents

⚠️ This page may combine multiple inventors who share the name “GHOSH SANTOSH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GHOSH SANTOSH

INTEL CORP

Cryptographic isolation of memory compartments in a computing environment

Implicit integrity for cryptographic computing

Cryptographic isolation of memory compartments in a computing environment

Microprocessor pipeline circuitry to support cryptographic computing

Management of keys for use in cryptographic computing

Lightweight cryptographic engine

Self-adaptive security framework

Cryptographic computing engine for memory load and store units of a microarchitecture pipeline

Lightweight cryptographic engine

Post-quantum secure remote attestation for autonomous systems

Unified accelerator for classical and post-quantum digital signature schemes in computing environments

Low latency post-quantum signature verification for fast secure-boot

Combined SHA2 and SHA3 based XMSS hardware accelerator

Accelerators for post-quantum cryptography secure hash-based signing and verification

Remote attestation with hash-based signatures

State synchronization for post-quantum signing facilities

Hardware mechanisms for link encryption

Homomorphic encryption for machine learning and neural networks using high-throughput CRT evaluation

Homomorphic encryption for machine learning and neural networks using high-throughput CRT evaluation

Countermeasures for side-channel attacks on protected sign and key exchange operations

Hybridization of dilithium and falcon for digital signatures

Digital signature verification engine for reconfigurable circuit devices

Low-latency digital signature processing with side-channel security

Collision-free hashing for accessing cryptographic computing metadata and for cache expansion

Collision-free hashing for accessing cryptographic computing metadata and for cache expansion

Digital signature verification engine for reconfigurable circuit devices

Processor hardware and instructions for SHA3 cryptographic operations

Cryptographic computing with context information for transient side channel security

Low latency post-quantum signature verification for fast secure-boot

Efficient post-quantum secure software updates tailored to resource-constrained devices

Transient side-channel aware architecture for cryptographic computing

Efficient quantum-attack resistant functional-safe building block for key encapsulation and digital signature

Technology to provide fault tolerance for elliptic curve digital signature algorithm engines

Combined SHA2 and SHA3 based XMSS hardware accelerator

Bus-off attack prevention circuit

Permutation cipher encryption for processor-accelerator memory mapped input/output communication

Processor hardware and instructions for lattice based cryptography

MTS-based mutual-authenticated remote attestation

Odd index precomputation for authentication path computation

Accelerators for post-quantum cryptography secure hash-based signing and verification

Message index aware multi-hash accelerator for post quantum cryptography secure hash-based signing and verification

Fast XMSS signature verification and nonce sampling process without signature expansion

System, apparatus and method for performing a plurality of cryptographic operations

Efficient post-quantum secure software updates tailored to resource-constrained devices

MTS-based mutual-authenticated remote attestation

Message index aware multi-hash accelerator for post quantum cryptography secure hash-based signing and verification

Odd index precomputation for authentication path computation

Post quantum public key signature operation for reconfigurable circuit devices

Bus-off attack prevention circuit

UNIV CASE WESTERN RESERVE

Epithelial cancer evaluation using beta defensin