P

Inventor

GURUMURTHY CHARAVANA K

US7 patents
⚠️ This page may combine multiple inventors who share the name “GURUMURTHY CHARAVANA K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

4 patents
US7432202B2Oct 7, 2008

Method of substrate manufacture that decreases the package resistance

INTEL CORP4 citations58
US9691727B2Jun 27, 2017

Pad-less interconnect for electrical coreless substrate

INTEL CORP0 citations51
US10317952B2Jun 11, 2019

Compartment for magnet placement

INTEL CORP0 citations41
US10103037B2Oct 16, 2018

Flexible microelectronic systems and methods of fabricating the same

INTEL CORP0 citations37

ROY MIHIR K

2 patents
US8278214B2Oct 2, 2012

Through mold via polymer block package

ROY MIHIR K10 citations82
US8450857B2May 28, 2013

Through mold via polymer block package

ROY MIHIR K0 citations50

ZHANG QINGLEI

1 patent
US9299602B2Mar 29, 2016

Enabling package-on-package (PoP) pad surface finishes on bumpless build-up layer (BBUL) package

ZHANG QINGLEI2 citations55