Inventor

SU TING CHIEH

CN4 patents

⚠️ This page may combine multiple inventors who share the name “SU TING CHIEH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SU TING CHIEH

3 patents

US8686507B2Apr 1, 2014

System and method for I/O ESD protection with floating and/or biased polysilicon regions

SU TING CHIEH5 citations67

US8283726B2Oct 9, 2012

System and method for I/O ESD protection with polysilicon regions fabricated by processes for making core transistors

SU TING CHIEH0 citations46

US8319286B2Nov 27, 2012

System and method for input pin ESD protection with floating and/or biased polysilicon regions

SU TING CHIEH0 citations36

SEMICONDUCTOR MFG INT SHANGHAI

1 patent

US7642602B2Jan 5, 2010

System and method for I/O ESD protection with polysilicon regions fabricated by processes for making core transistors

SEMICONDUCTOR MFG INT SHANGHAI5 citations59