Inventor
TZENG TZUNG REN
US3 patents
Patents
3 patentsUS9218289B2Dec 22, 2015
Multi-core compute cache coherency with a release consistency memory ordering model
QUALCOMM INC11 citations82
US9015400B2Apr 21, 2015
Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)
QUALCOMM INC1 citations49
US9330026B2May 3, 2016
Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW)
QUALCOMM INC0 citations38