Inventor
CHURIWALA SANJAY
IN3 patents
Patents
3 patentsUS7076748B2Jul 11, 2006
Identification and implementation of clock gating in the design of integrated circuits
ATRENTA INC47 citations89
US7349835B2Mar 25, 2008
Method, system and computer program product for generating and verifying isolation logic modules in design of integrated circuits
ATRENTA INC10 citations80
US7712061B2May 4, 2010
Method, system, and computer program product for generating and verifying isolation logic modules in design of integrated circuits
ATRENTA INC4 citations59