Inventor

SAHA BRATIN

US81 patents

⚠️ This page may combine multiple inventors who share the name “SAHA BRATIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SAHA BRATIN

INTEL CORP

Memory reclamation with optimistic concurrency

Object based conflict detection in a software transactional memory

System and method for allocating and deallocating memory within transactional code

Protecting shared variables in a software transactional memory system

Hardware acceleration for a software transactional memory system

Synchronization of parallel processes using speculative execution of synchronization instructions

Mechanisms to accelerate transactions using buffered stores

Transactional memory with automatic object versioning

Method and apparatus for speculative execution of uncontended lock instructions

Software assisted nested hardware transactions

Processor extensions and software verification to support type-safe language environments running with untrusted code

Language level support for shared virtual memory

Efficient non-transactional write barriers for strong atomicity

Hardware acceleration for a software transactional memory system

Method and apparatus for performing dynamic optimization for software transactional memory

Coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions

Predicting contention in a processor

Shared virtual memory

Performing mode switching in an unbounded transactional memory (UTM) system

System and method for allocating and deallocating memory within transactional code

Language level support for shared virtual memory

Increasing functionality of a reader-writer lock

Unified optimistic and pessimistic concurrency control for a software transactional memory (STM) system

Mechanisms to accelerate transactions using buffered stores

SAHA BRATIN

Increasing functionality of a reader-writer lock

Concurrent thread execution using user-level asynchronous signaling

Hardware acceleration of a write-buffering software transactional memory

Using ephemeral stores for fine-grained conflict detection in a hardware accelerated STM

Accelerating software lookups by using buffered or ephemeral stores

Increasing functionality of a reader-writer lock

Handling precompiled binaries in a hardware accelerated software transactional memory system

Mechanisms for strong atomicity in a transactional memory system

AMAZON TECH INC

Attached accelerator scaling

Framework integration for instance-attachable accelerator

Fault-tolerant accelerator based inference service

Attached accelerator based inference service

ADL-TABATABAI ALI-REZA

Mechanisms to accelerate transactions using buffered stores

Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata

Unified optimistic and pessimistic concurrency control for a software transactional memory (STM) system

GRAY JAN

Performing mode switching in an unbounded transactional memory (UTM) system

Wait loss synchronization

WANG CHENG

Mechanism for software transactional memory commit/abort in unmanaged runtime environment

Efficient and consistent software transactional memory

CHEN HU

Shared virtual memory

XIAOCHENG ZHOU

Language level support for shared virtual memory

WELC ADAM

Mechanism for irrevocable transactions

LEWIS BRIAN T

Method, apparatus, and system for adaptive thread scheduling in transactional memory systems

YAN SHOUMENG

Two way communication support for heterogenous processors of a computer platform

MICROSOFT CORP

Minimizing code duplication in an unbounded transactional memory system by using mode agnostic transactional read and write barriers

AKKARY HAITHAM H

Unbounded transactional memory systems