Inventor

HUNG CHUN-HSIUNG

TW337 patents

⚠️ This page may combine multiple inventors who share the name “HUNG CHUN-HSIUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUNG CHUN-HSIUNG

MACRONIX INT CO LTD

Method for adjusting a reference current of a flash nitride read only memory (NROM) and device thereof

Automatic programming algorithm for page mode flash memory with variable programming pulse height and pulse width

Memory and method for checking reading errors thereof

Regulator system for charge pump circuits

Flash EPROM erase algorithm with wordline level retry

Page mode floating gate memory device storing multiple bits per cell

Multi-stage charge pump without threshold drop with frequency modulation between embedded mode operations

Write protected, non-volatile memory device with user programmable sector lock capability

Dual reference cell sensing scheme for non-volatile memory

Memory cell sense amplifier

Fowler-Nordheim (F-N) tunneling for pre-programming in a floating gate memory device

Page mode program, program verify, read and erase verify for floating gate memory device with low current page buffer

Advanced program verify for page mode flash memory

Technique for reconfiguring a high density memory

Physical unclonable function for non-volatile memory

Parallel read and verify for floating gate memory device

Clock integrated circuit

Nonvolatile memory with program while program verify

Flash memory device with byte erase

Four-phase charge pump with lower peak current

Non-volatile integrated circuit having read while write capability using one address register

Bit latch scheme for parallel program verify in floating gate memory device

Cell sensing circuit for phase change memory and methods thereof

Multiple-stage charge pump with charge recycle circuit

Apparatus and method for detecting word line leakage in memory devices

Method and system for a serial peripheral interface

Apparatus and method for detecting word line leakage in memory devices

Circuit and method for high speed sensing

Circuit and method for tuning a reference bit line loading to a sense amplifier by optionally cutting a capacitive reference bit line

Memory array architecture

Enhanced word line driver to reduce gate capacitance for low voltage applications

Triple well charge pump

On chip voltage generation for low power integrated circuits

Triple well floating gate memory and operating method with isolated channel program, preprogram and erase processes

Power saving buffer circuit buffer bias voltages

Block-level wordline enablement to reduce negative wordline stress

Low current floating gate programming with bit-by-bit verification

Flash memory erase with controlled band-to-band tunneling current

Multi-input/output serial peripheral interface and method for data transmission

Regulated reference voltage circuit for flash memory device and other integrated circuit applications

Rapid on chip voltage generation for low power integrated circuits

Method of programming and erasing a non-volatile memory array

Regulated negative voltage supply circuit for floating gate memory devices

Non-volatile computing method in flash memory

HUNG CHUN-HSIUNG

Memory architecture of 3D array with diode in memory string

3D memory array with improved SSL and BL contact layout

Architecture for a 3D memory array

CHEN CHUNG-KUANG

Clock integrated circuit

Clock integrated circuit

MACRONIX INT L CO LTD

Decoded wordline driver with positive and negative voltage modes