Inventor

KERBER MARTIN

DE35 patents

⚠️ This page may combine multiple inventors who share the name “KERBER MARTIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KERBER MARTIN

SIEMENS AG

Method for producing sublithographic etching masks

High density integrated semiconductor memory and method for producing the memory

Memory cell and method for producing the memory cell

Process for manufacturing an integrated CMOS circuit

Method of manufacturing semiconductor components

MOS transistor for biotechnical applications

MOSFET on SOI substrate

Method for producing very small structural widths on a semiconductor substrate

SOI-BiCMOS method

Integrated switching circuit with CMOS circuit and method for producing isolated active regions of a CMOS circuit

Lateral bipolar transistor

Method of producing the source regions of a flash EEPROM memory cell array

Semiconductor configuration for an insulating transistor

CMOS Semiconductor structure and process for producing the same

Semiconductor structure for an MOS transistor and method for fabricating the semiconductor structure

Method for producing contact holes

INFINEON TECHNOLOGIES AG

Procedure for arranging chips of a first substrate on a second substrate

Semiconductor wafer having a dielectric reliability test structure, integrated circuit product and test method

Process for manufacturing a CMOS circuit with all-around dielectrically insulated source-drain regions

Semiconductor structure including guard ring

System that detects damage in adjacent dice

Test arrangement having chips of a first substrate on a second substrate and chips of the second substrate on a third substrate

Electronic switching circuit, switching circuit test arrangement and method for determining the operativeness of an electronic switching circuit

Method of producing a semiconductor surface covered with fluorine

Semiconductor structure including guard ring

CMOS circuit with all-around dielectrically insulated source-drain regions

Semiconductor structure for a MOS transistor

Method for the elimination of the effects of defects on wafers

KERBER MARTIN

Signal transmission arrangement

Semiconductor structure including guard ring

High voltage semiconductor devices and methods of forming the same

Detection of pre-catastrophic, stress induced leakage current conditions for dielectric layers

INFINEON TECHNOLOGIES AUSTRIA AG

Signal transmission arrangement

QIMONDA AG

Method and apparatus for reducing charge trapping in high-k dielectric material

ZIMMERLING MARTIN

Implant sensor and control