P

Inventor

JOSHI ANIRUDDHA P

US13 patents

Patents

13 patents
US6944796B2Sep 13, 2005

Method and system to implement a system event log for system manageability

INTEL CORP101 citations96
US7411631B1Aug 12, 2008

Power management for processor-based appliances

INTEL CORP82 citations93
US7213094B2May 1, 2007

Method and apparatus for managing buffers in PCI bridges

INTEL CORP21 citations91
US7596638B2Sep 29, 2009

Method, system, and apparatus to decrease CPU temperature through I/O bus throttling

INTEL CORP14 citations83
US7251755B2Jul 31, 2007

Apparatus and method for maintaining data integrity following parity error detection

INTEL CORP8 citations72
US7111103B2Sep 19, 2006

Method and apparatus for system management applications using a local controller

INTEL CORP9 citations72
US6918062B2Jul 12, 2005

System and method to implement a cost-effective remote system management mechanism using a serial communication controller and interrupts

INTEL CORP10 citations72
US6898651B2May 24, 2005

Method, apparatus, and system for generating serial interrupt requests (IRQ) with power savings

INTEL CORP8 citations72
US6646686B1Nov 11, 2003

Managing alpha values for video mixing operations

INTEL CORP11 citations72
US6792478B2Sep 14, 2004

System and method to configure input/output (IO) devices to use selected pairs of port addresses

INTEL CORP5 citations62
US7346725B2Mar 18, 2008

Method and apparatus for generating traffic in an electronic bridge via a local controller

INTEL CORP2 citations61
US7103692B2Sep 5, 2006

Method and apparatus for an I/O controller to alert an external system management controller

INTEL CORP6 citations61
US6973526B2Dec 6, 2005

Method and apparatus to permit external access to internal configuration registers

INTEL CORP6 citations60