Inventor

HUANG RICHARD J

US76 patents

⚠️ This page may combine multiple inventors who share the name “HUANG RICHARD J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG RICHARD J

ADVANCED MICRO DEVICES INC

Use of amorphous carbon for gate patterning

Use of diamond as a hard mask material

Photoresist stripping without degrading low dielectric constant materials

Simplified dual damascene process for multi-level metallization and interconnection structure

Method of using amorphous carbon as spacer material in a disposable spacer process

Methods of manufacture of uniform spin-on films

Low-k photoresist removal process

Landing pad technology doubled up as a local interconnect and borderless contact for deep sub-half micrometer IC application

Tunneling technology for reducing intra-conductive layer capacitance

Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application

Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material

CVD organic polymer film for advanced gate patterning

Cu damascene interconnections using barrier/capping layer

Apparatus for manufacturing planar spin-on films

Semiconductor device with variable composition low-k inter-layer dielectric and method of making

Method of re-working copper damascene wafers

Method of fabricating dual damascene with silicon carbide via mask/ARC

Integration of low-k SiOF for damascene structure

Self-aligning vias for semiconductors

Method and system for modifying and densifying a porous film

Intergration of low-K SiOF as inter-layer dielectric

Rapid acceleration methods for global planarization of spin-on films

Integration of low-K SiOF for damascene structure

Method for improving semiconductor dielectrics

High integrity borderless vias with HSQ gap filled patterned conductive layers

Stacked gate structure for flash memory application

Low RC interconnection

Use of multilayer amorphous carbon ARC stack to eliminate line warpage phenomenon

Semiconductor component and method of manufacture

Continuous barrier for interconnect structure formed in porous dielectric material with minimized electromigration

Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes

Surface treatment of low-K SiOF to prevent metal interaction

Non-volatile memory device with encapsulated tungsten gate and method of making same

Method of making tungsten gate MOS transistor and memory cell by encapsulating

Apparatus and methods for uniform scan dispensing of spin-on materials

Scalable and reliable integrated circuit inter-level dielectric

Surface treatment of low-k SiOF to prevent metal interaction

Reduction of silicon oxynitride film delamination in integrated circuit inter-level dielectrics

Production worthy interconnect process for deep sub-half micrometer back-end-of-line technology

Production worthy interconnect process for deep sub-half micrometer back-end-of-line technology

Method for forming integrated circuit

Method of using amorphous carbon to prevent resist poisoning

Method of shallow trench isolation (STI) formation using amorphous carbon

Solution flow-in for uniform deposition of spin-on films

Integration of low-K SiOF as inter-layer dielectric for AL-gapfill application

Semiconductor device containing P-HDP interdielectric layer

Method of forming an interlevel dielectric layer employing dielectric etch-back process without extra mask set

Method of forming copper interconnect capping layers with improved interface and adhesion

EUV reflective mask having a carbon film and a method of making such a mask

ADVANCED MICRO DEVICS INC

Low RC interconnection