Inventor

KASA YASUSHI

JP58 patents

⚠️ This page may combine multiple inventors who share the name “KASA YASUSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KASA YASUSHI

FUJITSU LTD

Write protect input implementation for a simultaneous operation flash memory device

Semiconductor memory device for selecting and deselecting blocks of word lines

Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics

Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics

Flash memory with improved erasability and its circuitry

Nonvolatile semiconductor memory

XOR CMOS logic gate

Nonvolatile semiconductor memory

Nonvolatile semiconductor memory

High voltage comparator

Substrate voltage control circuit for a flash memory

Nonvolatile semiconductor memory

Semiconductor memory device having means for replacing defective memory cells

Flash memory with improved erasability and its circuitry

Semiconductor memory device for selecting and deselecting blocks of word lines

Flash memory with improved erasability and its circuitry

Nonvolatile semiconductor memory device having a status register and test method for the same

Nonvolatile semiconductor memory that eases the dielectric strength requirements

Nonvolatile semiconductor memory device having a status register and test method for the same

Memory circuit with redundant configuration

Nonvolatile semiconductor memory

Semiconductor memory device having a redundant memory which can be selectively placed in a not-in-use status

Nonvolatile semiconductor memory device supplying proper program potential

Nonvolatile semiconductor memory with improved sense amplifier operating margin

Negative voltage circuit for a flash memory

Semiconductor memory having a sense amplifier with load transistors having different load characteristics

Nonvolatile semiconductor memory device having a status register and test method for the same

Semiconductor memory device with electrically controllable threshold voltage

Nonvolatile semiconductor memory with pre-read means

Sense amplifier circuit

Signal transition detection circuit

Nonvolatile semiconductor memory that eases the dielectric strength requirements

Semiconductor memory

ADVANCED MICRO DEVICES INC

Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture

Redundant dual bank architecture for a simultaneous operation flash memory

Architecture for a dual-bank page mode memory with redundancy

VT reference voltage for extremely low power supply

Method of making flexibly partitioned metal line segments for a simultaneous operation flash memory device with a flexible bank partition architecture

Memory address decoding circuit for a simultaneous operation flash memory device with a flexible bank partition architecture

Simultaneous operation flash memory device with a flexible bank partition architecture

OTP sector double protection for a simultaneous operation flash memory

Common flash interface implementation for a simultaneous operation flash memory device

Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture

Acceleration voltage implementation for a high density flash memory device

Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture

Sector write protect CAMS for a simultaneous operation flash memory

Common flash interface implementation for a simultaneous operation flash memory device

Multiple purpose bus for a simultaneous operation flash memory device

SPANSION LLC

Semiconductor device and programming method

Semiconductor device and programming method therefor