Inventor

HEIN THOMAS

DE129 patents

⚠️ This page may combine multiple inventors who share the name “HEIN THOMAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEIN THOMAS

INFINEON TECHNOLOGIES AG

Method and circuit arrangement for controlling write access to a semiconductor memory

Circuit for producing a data bit inversion flag

Delay locked loop for generating complementary clock signals

Synchronous integrated memory

Apparatus and method for controlling a driver strength

Data memory system and method for transferring data into a data memory

Read latency control circuit

Delay locked loop

Calibration configuration

Integrable, controllable delay device, delay device in a control loop, and method for delaying a clock signal using a delay device

Integrated circuit and method for testing it

Semiconductor memory having a delay locked loop

Parallel-serial converter

Integrated memory having a row access controller for activating and deactivating row lines

Memory component with short access time

Circuit configuration for generating an output clock signal with optimized signal generation time

Integrated circuit for generating a phase-shifted output clock signal from a clock signal

Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits

MICRON TECHNOLOGY INC

Multiple memory die techniques

Apparatuses including ball grid arrays and associated systems and methods

Memory health status reporting

Transmission failure feedback schemes for reducing crosstalk

Ball grid arrays and associated apparatuses and systems

Multi-level receiver with termination-off mode

Training procedure for receivers associated with a memory device

Multi-level signaling for a memory device

Temperature-based memory management

Transmission failure feedback schemes for reducing crosstalk

Dynamic control of error management and signaling

Dynamically configuring transmission lines of a bus

Training procedure for receivers associated with a memory device

Pre-distortion for multi-level signaling

Interleaved codeword transmission for a memory device

Bit and signal level mapping

QIMONDA AG

Phase shift adjusting method and circuit

Electronic device, method for operating an electronic device, memory circuit and method of operating a memory circuit

Memory controller, memory circuit and memory system with a memory controller and a memory circuit

Control signal training

Asynchronous data transmission

HEIN THOMAS

Circuit

Data mask encoding in data bit inversion scheme

Circuit

SIEMENS AG

Integrated memory having column decoder for addressing corresponding bit line

Integrated circuit with a phase locked loop

PS4 LUXCO SARL

Data mask encoding in data bit inversion scheme

RICHTER MICHAEL

Semiconductor memory with memory cell portions having different access speeds

BROSE FAHRZEUGTEILE

Motor vehicle seat

GREGORIUS PETER

Multi-port DRAM architecture for accessing different memory partitions

INFINEON TECHNOLOGIES

Voltage generator with superimposed reference voltage and deactivation signals

SCHNEIDER ANDREAS

Interface voltage adjustment based on error detection