Inventor
ERMOLOVICH ALEXANDER V
RU6 patents
⚠️ This page may combine multiple inventors who share the name “ERMOLOVICH ALEXANDER V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
4 patentsUS10241801B2Mar 26, 2019
Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator
INTEL CORP0 citations48
US10235171B2Mar 19, 2019
Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor
INTEL CORP0 citations48
US10241789B2Mar 26, 2019
Method to do control speculation on loads in a high performance strand-based loop accelerator
INTEL CORP0 citations37
US10241794B2Mar 26, 2019
Apparatus and methods to support counted loop exits in a multi-strand loop processor
INTEL CORP0 citations37
ELBRUS INTERNAT
2 patentsUS7065750B2Jun 20, 2006
Method and apparatus for preserving precise exceptions in binary translated code
ELBRUS INTERNAT24 citations86
US7069412B2Jun 27, 2006
Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture
ELBRUS INTERNAT3 citations59