Inventor

TAYLOR GREGORY F

US51 patents

⚠️ This page may combine multiple inventors who share the name “TAYLOR GREGORY F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAYLOR GREGORY F

INTEL CORP

On-chip termination

Method and apparatus for early detection of reliability degradation of electronic devices

Timing control for input/output testability

Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation

Integrated circuit device having C4 and wire bond connections

Method and apparatus for biasing a charge pump

Delay tuning to improve timing in multi-load systems

Method and apparatus for voltage-mode differential simultaneous bi-directional signaling

Output buffer with timing feedback

Clock noise filter for integrated circuits

On-die offset reference circuit block

Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock

Integrated circuit device having C4 and wire bond connections

Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation

I/O device testing method and apparatus

Semiconductor package substrate with power die

Power-on initializing circuit

Method and apparatus to ensure proper voltage and frequency configuration signals are defined before applying power to processor

Clocked sense amplifier flip flop with keepers to prevent floating nodes

Internal clock jitter detector

Power-on detect circuit for use with multiple voltage domains

Differential power bus comparator

Processor system with power supply selection mechanism

Testing arrangement to distribute integrated circuits

Multistage configuration and power setting

Timing control for input/output testability

Power supply noise filter

Large fan-in, dynamic, bicmos logic gate

Swing limiting circuit for BiCMOS sense amplifiers

Reference generator circuit for BiCMOS ECL gate employing PMOS load devices

Self-calibrated thermal sensors of an integrated circuit die

Self-calibrated thermal sensors of an integrated circuit die

On-chip frequency degradation compensation

On-chip frequency degradation compensation

Phase locked loop system capable of deskewing

Fuse programming schemes for robust yield

Input circuit with switched reference signals

Input circuit with non-delayed time blanking

Arrangements having IC voltage and thermal resistance designated on a per IC basis

Arrangements having IC voltage and thermal resistance designated on a per IC basis

On-chip frequency degradation compensation

AC testing of leakage current in integrated circuits using RC time constant

AC testing of leakage current in integrated circuits using RC time constant

AC testing of leakage current in integrated circuits using RC time constant

Fuse cell array with redundancy features

BIPOLAR INTEGRATED TECHNOLOGY

Methods and apparatus for determining the absolute value of the difference between binary operands

Floating point processor with internal free-running clock

Method and apparatus for implementing binary multiplication using booth type multiplication

ABDELMONEUM MOHAMED A

Thermal sensor using a vibrating MEMS resonator of a chip interconnect layer

ZEPEDA PAOLA

On-die digital-to-analog conversion testing