P

Inventor

MCELREA SIMON J S

US13 patents
⚠️ This page may combine multiple inventors who share the name “MCELREA SIMON J S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MCELREA SIMON J S

5 patents
US8178978B2May 15, 2012

Support mounted electrically interconnected die assembly

MCELREA SIMON J S77 citations96
US8723332B2May 13, 2014

Electrically interconnected stacked die assemblies

MCELREA SIMON J S35 citations92
US8629543B2Jan 14, 2014

Electrically interconnected stacked die assemblies

MCELREA SIMON J S19 citations90
US9305862B2Apr 5, 2016

Support mounted electrically interconnected die assembly

MCELREA SIMON J S7 citations82
US8324081B2Dec 4, 2012

Wafer level surface passivation of stackable integrated circuit chips

MCELREA SIMON J S2 citations61

VERTICAL CIRCUITS INC

2 patents
US7923349B2Apr 12, 2011

Wafer level surface passivation of stackable integrated circuit chips

VERTICAL CIRCUITS INC37 citations91
US7843046B2Nov 30, 2010

Flat leadless packages and stacked leadless package assemblies

VERTICAL CIRCUITS INC21 citations89

INVENSAS CORP

2 patents
US9824999B2Nov 21, 2017

Semiconductor die mount by conformal die coating

INVENSAS CORP1 citations60
US9252116B2Feb 2, 2016

Semiconductor die mount by conformal die coating

INVENSAS CORP2 citations60

CRANE SCOTT JAY

1 patent
US8704379B2Apr 22, 2014

Semiconductor die mount by conformal die coating

CRANE SCOTT JAY14 citations87

CO REYNALDO

1 patent
US8680687B2Mar 25, 2014

Electrical interconnect for die stacked in zig-zag configuration

CO REYNALDO7 citations81

ANDREWS JR LAWRENCE DOUGLAS

1 patent
US8159053B2Apr 17, 2012

Flat leadless packages and stacked leadless package assemblies

ANDREWS JR LAWRENCE DOUGLAS4 citations56

CASKEY TERRENCE

1 patent
US8742602B2Jun 3, 2014

Vertical electrical interconnect formed on support prior to die mount

CASKEY TERRENCE0 citations48