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Inventor

TZARTZANIS NESTOR

US12 patents
⚠️ This page may combine multiple inventors who share the name “TZARTZANIS NESTOR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FUJITSU LTD

5 patents
US7616070B2Nov 10, 2009

Electronic oscillators having a plurality of phased outputs and such oscillators with phase-setting and phase-reversal capability

FUJITSU LTD17 citations92
US7307483B2Dec 11, 2007

Electronic oscillators having a plurality of phased outputs and such oscillators with phase-setting and phase-reversal capability

FUJITSU LTD23 citations92
US6842046B2Jan 11, 2005

Low-to-high voltage conversion method and system

FUJITSU LTD30 citations92
US7075842B2Jul 11, 2006

Differential current-mode sensing methods and apparatuses for memories

FUJITSU LTD15 citations83
US7405593B2Jul 29, 2008

Systems and methods for transmitting signals across integrated circuit chips

FUJITSU LTD1 citations51

UNIV SOUTHERN CALIFORNIA

2 patents
US7005893B1Feb 28, 2006

High-performance clock-powered logic

UNIV SOUTHERN CALIFORNIA22 citations90
US7626425B2Dec 1, 2009

High performance clock-powered logic

UNIV SOUTHERN CALIFORNIA3 citations60

NEDOVIC NIKOLA

2 patents
US8300754B2Oct 30, 2012

Clock and data recovery with a data aligner

NEDOVIC NIKOLA17 citations83
US8300753B2Oct 30, 2012

Triple loop clock and data recovery (CDR)

NEDOVIC NIKOLA1 citations51

WALKER WILLIAM W

1 patent
US8718217B2May 6, 2014

Clock and data recovery (CDR) using phase interpolation

WALKER WILLIAM W11 citations81

KRISTENSSON H ANDERS

1 patent
US8058914B2Nov 15, 2011

Generating multiple clock phases

KRISTENSSON H ANDERS11 citations78

PARIKH SAMIR

1 patent
US8411782B2Apr 2, 2013

Parallel generation and matching of a deskew channel

PARIKH SAMIR1 citations50