Inventor
HERNANDEZ JOSHUA P
US4 patents
Patents
4 patentsUS7856582B2Dec 21, 2010
Techniques for logic built-in self-test diagnostics of integrated circuit devices
IBM9 citations80
US7519889B1Apr 14, 2009
System and method to reduce LBIST manufacturing test time of integrated circuits
IBM10 citations78
US7930610B2Apr 19, 2011
System and method for power reduction through power aware latch weighting of complex sub-circuits
IBM0 citations38
US7925948B2Apr 12, 2011
System and method for power reduction through power aware latch weighting
IBM0 citations38