Inventor

PARK DAE-GYU

US92 patents

⚠️ This page may combine multiple inventors who share the name “PARK DAE-GYU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PARK DAE-GYU

IBM

finFETS and methods of making same

High-temperature stable gate structure with metallic electrode

Lateral heterojunction bipolar transistors

Method of creating deep trench capacitor using a P+ metal electrode

Gate electrode forming methods using conductive hard mask

Temperature stable metal nitride gate electrode

Method of creating deep trench capacitor using a P+ metal electrode

FinFET with longitudinal stress in a channel

Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors

Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET region

Method of forming an ultra-thin [[HfSiO]] metal silicate film for high performance CMOS applications and semiconductor structure formed in said method

Transistor having V-shaped embedded stressor

Fin field effect transistor including a strained epitaxial semiconductor shell

Shallow extension junction

Process variability tolerant hard mask for replacement metal gate finFET devices

3D transistor channel mobility enhancement

Self-aligned CMOS structure with dual workfunction

Gate effective-workfunction modification for CMOS

High-temperature stable gate structure with metallic electrode

Metal gates with low charge trapping and enhanced dielectric reliability characteristics for high-k gate dielectric stacks

Threshold voltage improvement employing fluorine implantation and adjustment oxide layer

Simplified vertical array device DRAM/eDRAM integration: method and structure

Fin field effect transistor including a strained epitaxial semiconductor shell

3D transistor channel mobility enhancement

HYUNDAI ELECTRONICS IND

Gate structure with high K dielectric

Method for making high K dielectric gate for semiconductor device

Method of manufacturing a semiconductor device utilizing a(Al2O3)X-(TiO2)1-X gate dielectric film

Method for manufacturing a gate structure incorporating therein aluminum oxide as a gate dielectric

Method for forming aluminum oxide as a gate dielectric

Method of forming a gate electrode in a semiconductor device

Method for manufacturing a gate structure incorporating aluminum oxide as a gate dielectric

Method for manufacturing a gate structure incorporated therein a high K dielectric

Method for fabricating capacitor of semiconductor memory device using titanium aluminum nitride as diffusion-inhibiting layer

HYNIX SEMICONDUCTOR INC

Method of manufacturing semiconductor devices with titanium aluminum nitride work function

CMOS of semiconductor device and method for manufacturing the same

CMOS of semiconductor device and method for manufacturing the same

Cmos of semiconductor device and method for manufacturing the same

Method of forming a metal gate in a semiconductor device using atomic layer deposition process

Method for forming a gate for semiconductor devices

CAI JIN

Germanium lateral bipolar junction transistor

Germanium lateral bipolar junction transistor

SOI lateral bipolar junction transistor having a wide band gap emitter contact

CHAN KEVIN K

Delta monolayer dopants epitaxy for embedded source/drain silicide

finFETs and methods of making same

Method of replacement source/drain for 3D CMOS transistors

YUHAN CORP

Process for preparing aminopyrimidine derivatives

Process for preparing aminopyrimidine derivatives

HEKMATSHOAR-TABARI BAHMAN

Method of stabilizing hydrogenated amorphous silicon and amorphous hydrogenated silicon alloys

YIN HAIZHOU

Structure of high-K metal gate semiconductor transistor

CHEN XIANGDONG

High pressure deuterium treatment for semiconductor/high-K insulator interface