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Inventor
HUGHES EDWARD J
US
2 patents
Patents
2 patents
US7356793B2
Apr 8, 2008
Genie: a method for classification and graphical display of negative slack timing test failures
IBM
9 citations
82
US7823108B2
Oct 26, 2010
Chip having timing analysis of paths performed within the chip during the design process
IBM
5 citations
58