P

Inventor

SWANSON ROBERT C

US63 patents
⚠️ This page may combine multiple inventors who share the name “SWANSON ROBERT C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

32 patents
US8751864B2Jun 10, 2014

Controlling memory redundancy in a system

INTEL CORP19 citations92
US8352779B2Jan 8, 2013

Performing redundant memory hopping

INTEL CORP5 citations84
US7987348B2Jul 26, 2011

Instant on video

INTEL CORP8 citations84
US7865762B2Jan 4, 2011

Methods and apparatus for handling errors involving virtual machines

INTEL CORP7 citations84
US7793090B2Sep 7, 2010

Dual non-volatile memories for a trusted hypervisor

INTEL CORP12 citations84
US8024477B2Sep 20, 2011

System and method to establish a peer-to-peer IT backbone

INTEL CORP18 citations83
US7890811B2Feb 15, 2011

Method and apparatus for improved memory reliability, availability and serviceability

INTEL CORP12 citations83
US7949850B2May 24, 2011

Methods and appratus for demand-based memory mirroring

INTEL CORP9 citations81
US7434102B2Oct 7, 2008

High density compute center resilient booting

INTEL CORP8 citations74
US9798641B2Oct 24, 2017

Method to increase cloud availability and silicon isolation using secure enclaves

INTEL CORP4 citations73
US9686281B2Jun 20, 2017

Trusted application migration across computer nodes

INTEL CORP5 citations72
US9477564B2Oct 25, 2016

Method and apparatus for dynamic node healing in a multi-node environment

INTEL CORP6 citations72
US9880859B2Jan 30, 2018

Boot image discovery and delivery

INTEL CORP5 citations71
US9413765B2Aug 9, 2016

Multinode hubs for trusted computing

INTEL CORP5 citations71
US9454214B2Sep 27, 2016

Memory state management for electronic device

INTEL CORP3 citations70
US9703346B2Jul 11, 2017

Firmware interface with backup non-volatile memory storage

INTEL CORP6 citations69
US7900084B2Mar 1, 2011

Reliable memory for memory controller with multiple channels

INTEL CORP3 citations63
US7831858B2Nov 9, 2010

Extended fault resilience for a platform

INTEL CORP2 citations63
US7716464B2May 11, 2010

Method to have fault resilient booting

INTEL CORP5 citations63
US7596714B2Sep 29, 2009

Methods and apparatus to manage throttling in computing environments

INTEL CORP5 citations63
US10372491B2Aug 6, 2019

Execution context migration method and apparatus

INTEL CORP1 citations62
US7721080B2May 18, 2010

Management of option ROM

INTEL CORP6 citations62
US9465647B2Oct 11, 2016

Providing state storage in a processor for system management mode selectively enabled by register bit instead of external SMRAM

INTEL CORP2 citations61
US7673128B2Mar 2, 2010

Methods and apparatus to facilitate fast restarts in processor systems

INTEL CORP6 citations60
US7779244B2Aug 17, 2010

Multi-socket boot

INTEL CORP6 citations59
US10649832B2May 12, 2020

Technologies for headless server manageability and autonomous logging

INTEL CORP1 citations56
US10386900B2Aug 20, 2019

Thread aware power management

INTEL CORP1 citations54
US8965749B2Feb 24, 2015

Demand based USB proxy for data stores in service processor complex

INTEL CORP1 citations52
US8649818B2Feb 11, 2014

Software-defined radio support in sequestered partitions

INTEL CORP0 citations52
US8370667B2Feb 5, 2013

System context saving based on compression/decompression time

INTEL CORP0 citations52
US7945841B2May 17, 2011

System and method for continuous logging of correctable errors without rebooting

INTEL CORP1 citations52
US10169268B2Jan 1, 2019

Providing state storage in a processor for system management mode

INTEL CORP0 citations51

SWANSON ROBERT C

10 patents

ZIMMER VINCENT J

2 patents

SAKTHIKUMAR PALSAMY

2 patents

HUM HERBERT H

1 patent

TELETYPE CORP

1 patent

BULUSU MALLIK

1 patent

NATU MAHESH S

1 patent

Showing the top 50 of 63 patents by PatentIndex Score.