Inventor

PETERS CARSTEN

DE37 patents

⚠️ This page may combine multiple inventors who share the name “PETERS CARSTEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PETERS CARSTEN

ADVANCED MICRO DEVICES INC

Nano imprint technique with increased flexibility with respect to alignment and feature shaping

Semiconductor device comprising a contact structure with increased etch selectivity

Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same

Method of increasing the etch selectivity in a contact structure of semiconductor devices

Technique for compensating for a difference in deposition behavior in an interlayer dielectric material

Technique for creating different mechanical strain by forming a contact etch stop layer stack having differently modified intrinsic stress

Technique for creating different mechanical strain by a contact etch stop layer stack with an intermediate etch stop layer

Reducing contamination of semiconductor substrates during beol processing by providing a protection layer at the substrate edge

Technique for forming an interlayer dielectric material of increased reliability above a structure including closely spaced lines

Increased reliability for a contact structure to connect an active region with a polysilicon line

Technique for compensating for a difference in deposition behavior in an interlayer dielectric material

Semiconductor device including field effect transistors laterally enclosed by interlayer dielectric material having increased intrinsic stress

Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process

GLOBALFOUNDRIES INC

Front-end-of-line device structure and method of forming such a front-end-of-line device structure

Semiconductor device comprising a contact structure based on copper and tungsten

Test structure for monitoring leakage currents in a metallization layer

Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects

Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects

Semiconductor structure comprising an electrically conductive feature and method of forming a semiconductor structure

Technique for non-destructive metal delamination monitoring in semiconductor devices

Methods for fabricating integrated circuits including densifying interlevel dielectric layers

Semiconductor devices including Si/Ge active regions with different Ge concentrations

HILTI AG

Twist drill and production method

Control method and borehole flushing module

Chisel

Drill for chiselling rock

Portable power tool

Manufacturing process, tool stand, and drill bit

Manufacturing process, tool stand, and drill bit

Twist drill and production method

Control method and portable power tool

SEIDEL ROBERT

Nano imprint technique with increased flexibility with respect to alignment and feature shaping

Contact elements of semiconductor devices comprising a continuous transition to metal lines of a metallization layer

FEUSTEL FRANK

Method of selectively forming a conductive barrier layer by ALD

GLOBALFOUNDRIES US INC

Semiconductor devices having silicon/germanium active regions with different germanium concentrations

NOVARTIS AG

KAPREKY peptidomimetics and analogues thereof

PFÜTZNER EGON RONNY

Integrated circuits including barrier polish stop layers and methods for the manufacture thereof